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UMTS/HSPA Module Series UG95 Hardware Design About the Document History Revision Date Author Description 2014-06-20 Yeoman CHEN Initial Updated transmitting power information. Added reference design for power supply in Chapter 3.6.3. Updated timing of turning on module in Figure 9.
UMTS/HSPA Module Series UG95 Hardware Design Introduction This document defines the UG95 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand module interface specifications, electrical and mechanical details.
More details about GPRS/EDGE multi-slot configuration and coding schemes, please refer to Appendix B, C and D. With a tiny profile of 23.6mm × 19.9mm × 2.2mm, UG95 can meet almost all requirements for M2M application such as automotive, metering, tracking system, security solutions, routers, wireless POS, etc..
UMTS/HSPA Module Series UG95 Hardware Design 2.2. Key Features The following table describes the detailed features of UG95 module. Table 2: UG95 Key Features Feature Details Supply voltage: 3.3V ~ 4.3V Power Supply Typical supply voltage: 3.8V UG95-A: UMTS Dual-band: 850/1900MHz...
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Used for AT command communication, data transmission, software USB Interface debug and firmware upgrade USB Driver: Support Windows XP, Windows Vista, Windows 7, Windows 8, Windows CE5.0/6.0*, Linux, Android Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT AT Commands commands Real Time Clock Implemented...
RF performance might degrade. For example, the frequency error or the phase error would increase. *means this feature is under development. 2.3. Functional Diagram The following figure shows a block diagram of UG95 and illustrates the major functional parts. RF transceiver ...
Figure 1: Functional Diagram 2.4. Evaluation Board In order to help you to develop applications with UG95, Quectel supplies an evaluation board (UMTS<E-EVB), RS-232 to USB cable, USB data cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to document [2].
Application Interface 3.1. General Description UG95 is equipped with a 62-pin 1.1mm pitch SMT pads plus 40-pin ground pads and reserved pads that connect to customer’s cellular application platform. Sub-interfaces included in these pads are described in detail in the following chapters: ...
UMTS/HSPA Module Series UG95 Hardware Design 3.3. Pin Description The following tables show the UG95’s pin definition. Table 3: IO Parameters Definition Type Description Bidirectional input/output Digital input Digital output Power input Power output Analog input Analog output Open drain...
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UMTS/HSPA Module Series UG95 Hardware Design If unused, keep this pin open. 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67~74, Ground 79~82, 89~91, 100~102 Turn On/Off Pin Name Pin No. Description DC Characteristics Comment ≈200kΩ Pull-up to VRTC max=2.1V...
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UMTS/HSPA Module Series UG95 Hardware Design Compliant with USB USB differential data Require differential USB_DP 2.0 standard bus. impedance of 90Ω. specification. Compliant with USB USB differential data Require differential USB_DM 2.0 standard bus. impedance of 90Ω. specification. USIM Interface Pin Name Pin No.
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UMTS/HSPA Module Series UG95 Hardware Design max=0.35V 1.8V power domain. USIM_PRES USIM card input min=1.3V External pull-up ENCE detection. max=1.85V resistor is required. Main UART Interface Pin Name Pin No. Description DC Characteristics Comment 1.8V power domain. max=0.25V Ring indicator If unused, keep this min=1.55V...
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UMTS/HSPA Module Series UG95 Hardware Design 1.8V power domain. max=0.25V In master mode, it is PCM data frame PCM_SYNC min=1.55V an output signal. sync signal If unused, keep this pin open. 1.8V power domain. In master mode, it’s max=0.25V PCM_CLK PCM data bit clock an output signal.
UMTS/HSPA Module Series UG95 Hardware Design 26~28, 49, 56, 57, 63~66, 75~78, 83~88, 92~99. NOTE The function of AP_READY is under development. 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes...
VBAT_RF and VBAT_BB) remains applied. 3.5. Power Saving 3.5.1. Sleep Mode UG95 is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes power saving procedure of UG95. 3.5.1.1. UART Application If application processor communicates with module via UART interface, the following preconditions can let the module enter into the sleep mode.
UMTS/HSPA Module Series UG95 Hardware Design The following figure shows the connection between the module and application processor. Processor Module EINT GPIO GPIO AP_READY Figure 3: UART Sleep Application The RI of module is used to wake up the processor, and AP_READY will detect the sleep state of processor (can be configured to high level or low level detection).
UMTS/HSPA Module Series UG95 Hardware Design The following figure shows the connection between the module and processor. Processor Module USB_VBUS USB_DP USB_DP USB_DM USB_DM EINT Figure 4: USB Application with Suspend Function When the processor’s USB bus returns to resume state, the module will be woken up.
For detailed information about command AT+CFUN, please refer to document [1]. 3.6. Power Supply 3.6.1. Power Supply Pins UG95 provides four VBAT pins dedicated to connect with the external power supply. There are two separate voltage domains for VBAT. ...
Three ceramic capacitors (100nF, 33pF, 10pF) are recommended to be applied to the VBAT pins. The capacitors should be placed close to the UG95’s VBAT pins. In addition, in order to get a stable power source, it is suggested that you should use a zener diode of which reverse zener voltage is 5.1V and dissipation power is more than 0.5W.
UMTS/HSPA Module Series UG95 Hardware Design VBAT VBAT_RF VBAT_BB 100nF 33pF 10pF 100uF 100nF 33pF 10pF 100uF 5.1V Module Figure 7: Star Structure of the Power Supply 3.6.3. Reference Design for Power Supply The power design for the module is very important, since the performance of power supply for the module largely depends on the power source.
When UG95 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY.
UMTS/HSPA Module Series UG95 Hardware Design The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger.
UMTS/HSPA Module Series UG95 Hardware Design 3.7.2. Turn off Module The following procedures can be used to turn off the module: Normal power down procedure: Turn off the module using command AT+QPOWD. Emergency power down procedure: Turn off the module using the PWRDWN_N pin.
PWRDWN_N is released. It is recommended to use an open drain/collector driver to control the PWRDWN_N. The level of STATUS pin is low after UG95 is turned off. A simple reference circuit is illustrated in the following figure.
UMTS/HSPA Module Series UG95 Hardware Design The other way to control the PWRDWN_N is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger.
UMTS/HSPA Module Series UG95 Hardware Design 3.7.2.3. Automatic Shutdown The module will constantly monitor the voltage applied on the VBAT, if the voltage ≤ 3.5V, the following URC will be presented: +QIND: “vbatt”,-1 If the voltage ≥ 4.21V, the following URC will be presented: +QIND: “vbatt”,1...
UMTS/HSPA Module Series UG95 Hardware Design The recommended circuit is similar to the PWRKEY control circuit. You can use open drain/collector driver or button to control the RESET_N. RESET_N ≥ 100ms 4.7K Reset pulse Figure 16: Reference Circuit of RESET_N by Using Driving Circuit...
UG95. The capacitor is charged from the internal LDO of UG95 when there is power supply for the VBAT. A serial 1KΩ resistor has been placed on the application inside the module. It limits the input current of the capacitor.
UMTS/HSPA Module Series UG95 Hardware Design 3.10. UART Interface The module provides 7 lines UART interface. UART interface supports 300, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600bps baud rate, and the default is auto-baud rate 4800~115200. This interface can be used for data transmission, AT communication or firmware upgrade.
UMTS/HSPA Module Series UG95 Hardware Design UG95 provides one 1.8V UART interface. A level shifter should be used if your application is equipped with a 3.3V UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows the reference design of the TXS0108EPWR.
UMTS/HSPA Module Series UG95 Hardware Design The following figure is an example of connection between UG95 and PC. A voltage level translator and a RS-232 level translator chip must be inserted between module and PC, since the UART interface does not support the RS-232 level, while supports the 1.8V CMOS level only.
4.7k resistor internally. USIM_CLK Clock signal of USIM card. Specified ground for USIM USIM_GND card. UG95 supports USIM card hot-plugging via the USIM_PRESENCE pin. The following figure shows the reference design of the 8-pin USIM card. VDD_EXT USIM_VDD 100nF USIM holder...
UMTS/HSPA Module Series UG95 Hardware Design If you do not need the USIM card detection function, keep USIM_PRESENCE unconnected. The reference circuit for using a 6-pin USIM holder is illustrated as the following figure. USIM_VDD 100nF USIM_GND USIM holder USIM_VDD...
UG95 Hardware Design 3.12. USB Interface UG95 contains one integrated Universal Serial Bus (USB) transceiver which complies with the USB 1.1/2.0 specification and supports high speed (480Mbps) and full speed (12Mbps) mode. The USB interface is primarily used for AT command, data transmission, software debug and firmware upgrade.
Figure 26: Test Points of Firmware Upgrade NOTES 1. UG95 module can only be used as a slave device. 2. It is suggested that you should set USB_DP, USB_DM and USB_VBUS pins as test points and then place these test points on the DTE for debug.
UMTS/HSPA Module Series UG95 Hardware Design 3.13. PCM and I2C Interface UG95 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following features: Supports 8, 16, 32 bit mode with short frame synchronization, the PCM support 8 bit mode by default.
UMTS/HSPA Module Series UG95 Hardware Design Sampling freq. = 8 KHz PCM_SYNC PCM_CLK BCLK = 264 KHz PCM_IN/OUT 32-bit data word Figure 27: PCM Master Mode Timing In general, the BitClockFrequency (BCLK) is furnished by the following expression: BitClockFrequency=(DataWordBit +1) × SamplingFrequency The following figure shows the reference design of PCM interface with external codec IC.
1. It is recommended to reserve RC (R=22Ω, C=22pF) circuit on the PCM lines, especially for PCM_CLK. 2. UG95 module provides a digital clock output (CLK_OUT) for an external audio codec, the CLK_OUT function is disabled by default. When CLK_OUT is required, AT command is used to provide the codec with a 13/26MHz clock generated from the module.
UMTS/HSPA Module Series UG95 Hardware Design A reference circuit is shown in the following figure. VBAT Module 2.2K 4.7K NETLIGHT Figure 29: Reference Circuit of the NETLIGHT 3.15. Operating Status Indication The STATUS pin is set as the module status indicator. It will output high level when module is powered on.
UMTS/HSPA Module Series UG95 Hardware Design Antenna Interface The Pin 60 is the RF antenna pad. The RF interface has an impedance of 50Ω. 4.1. GSM/UMTS Antenna Interface 4.1.1. Pin Definition Table 18: Pin Definition of the RF Antenna Pin Name Pin No.
Figure 31: Reference Circuit of Antenna Interface UG95 provides an RF antenna PAD for customer’s antenna connection. The RF trace in host PCB connected to the module RF antenna pad should be micro-strip line or other types of RF trace, whose characteristic impendence should be close to 50Ω.
UMTS/HSPA Module Series UG95 Hardware Design You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT. Figure 33: Mechanicals of UF.L-LP Connectors (Unit: mm) The following figure describes the space factor of mated connector Figure 34: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
UMTS/HSPA Module Series UG95 Hardware Design Electrical, Reliability and Radio Characteristics 5.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table. Table 22: Absolute Maximum Ratings Parameter Min.
UMTS/HSPA Module Series UG95 Hardware Design Parameter Description Conditions Min. Typ. Max. Unit Peak supply Maximum power control level current (during VBAT on EGSM900. transmission slot) USB insert USB_VBUS 5.25 detection 5.3. Operating Temperature The operating temperature is listed in the following table.
UMTS2100 @max power UMTS1900 @max power WCDMA voice call UMTS850 @max power UMTS900 @max power 5.5. RF Output Power The following table shows the RF output power of UG95 module. Table 26: Conducted RF Output Power Frequency Max. Min. EGSM900 33dBm± 2dB 5dBm±...
In GPRS 4 slots TX mode, the max output power is reduced by 3dB. This design conforms to the GSM specification as described in chapter 13.16 of 3GPP TS 51.010-1. 5.6. RF Receiving Sensitivity The following table shows the conducted RF receiving sensitivity of UG95 module. Table 27: Conducted RF Receiving Sensitivity Frequency Receive Sensitivity (Typ.)
Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 6.1. Mechanical Dimensions of the Module 2.2+/-0.2 19.9+/-0.15 23.6+/-0.15 0.8+/-0.1 Figure 35: UG95 Top and Side Dimensions UG95_Hardware_Design Confidential / Released 57 / 72...
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UMTS/HSPA Module Series UG95 Hardware Design The recommended stencil of UG95 is showed as below. 19.90 23.60 62x0.7 62x2.25 frame line 0.95 Silksreen Figure Recommended Stencil of UG95 (Top View) NOTES In order to maintain the module, keep about 3mm between the module and other components in the host PCB.
UMTS/HSPA Module Series UG95 Hardware Design 6.3. Top View of the Module Figure 39: Top View of the Module 6.4. Bottom View of the Module Figure 40: Bottom View of the Module UG95_Hardware_Design Confidential / Released 61 / 72...
Storage and Manufacturing 7.1. Storage UG95 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at < 40º C/90%RH. After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be: ...
UMTS/HSPA Module Series UG95 Hardware Design It is suggested that peak reflow temperature is 235 ~ 245º C (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260º C. To avoid damage to the module when it was repeatedly heated, it is suggested that the module should be mounted after the first panel has been reflowed.
UMTS/HSPA Module Series UG95 Hardware Design 7.3. Packaging The modules are stored inside a vacuum-sealed bag which is ESD protected. It should not be opened until the devices are ready to be soldered onto the application. The reel is 330mm in diameter and each reel contains 250 modules.
Document Name Remark Quectel_WCDMA_UGxx_AT_Commands_Manual UGxx AT Commands Manual Quectel_UMTS<E_EVB_User_Guide UMTS<E EVB User Guide Quectel_UG95_Reference_Design UG95 Reference Design UG95 and M95 R2.0 Compatible Quectel_UG95&M95 R2.0_Reference_Design Reference Design UG95 and M95 R2.0 Compatibility Quectel_UG95&M95 R2.0_Compatible_Design Design Specification Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide...
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UMTS/HSPA Module Series UG95 Hardware Design Data Terminal Ready Discontinuous Transmission Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) Electrostatic Discharge Full Rate GMSK Gaussian Minimum Shift Keying Global Positioning System Global System for Mobile Communications Half Rate...
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UMTS/HSPA Module Series UG95 Hardware Design Password Authentication Protocol PBCCH Packet Broadcast Control Channel Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Phase Shift Keying Pulse Width Modulation Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying Radio Frequency RHCP Right Hand Circularly Polarized...
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UMTS/HSPA Module Series UG95 Hardware Design Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value...
UMTS/HSPA Module Series UG95 Hardware Design Appendix C GPRS Multi-slot Class Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions.