residual voltage transformer if the transformer is provided exclusively. Figure
12.6-4 shows how to set the reception of the residual voltage on the VCT.
AC Analog Input
10:48
AI#1
APPL-VCT
Figure 12.6-4 Residual voltage input screen
Note: This screen is a sample. The number of the CTs are dependent upon the
configuration of VCT modules in each IED.
Binary input
(ii)
All binary input circuits provided in the IED are user-configurable; the user can set common
programmable logic (CPL) for each binary input circuit. (For more information of CPL, see
Technical description: Binary IO module: Binary input circuit
Chapter
The user can activate or turn off the above timers and switches using the setting function.
To configure the binary input circuits, the user should follow the procedure in steps ((ii)-1 and
(ii)-2)
Selection of binary input circuit: For example, Figure 12.6-5 illustrates the
selection of a binary input circuit on a binary IO module. Move the cursor by
pressing keys ▲ and ▼. Then, press key ►to go to the next hierarchy.
APPL-VCT
1/2
10:48
>
[►]
>
APPL-VCT
10:48
- 1467 -
6F2S1914 (0.49)
1/2
APPL-Ves2
+
Vs2
Polarity Change
>
[►]
1/3
Off
Ve
Vs2
)
GRL200 (Soft 033 & 037)