Toshiba GR200 Series Instruction Manual page 1399

The signals are configured with the PLC function, as shown in Figure 11.3-30. The PLC can be
segmented into A to E blocks:
 A Judgements of validities coming from automatic supervision functions
 B Collection and exclusion logics of the judgements results
 C Generator logic of U16_00 quality bits
 D Generator logic of U16_01 quality bits
 E Test bit generator.
The Figure 11.3-30 logics are summarized into ○
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an monitoring result of an automatic supervision function
1
an error level set by each automatic supervision function
2
Detection of the absence of an error level which is set
3
Judgement if Serious error or Serious error(Comm) is occurring
4
Judgement of Invalid state
5
Judgement for state of Questionable
6
Data type conversion
7
Collection and combination of Invalid states
8
Collection and combination of Questionable states
9
Exclusion of Invalid and Questionable state (i.e. priority of Invalid)
10
14-bit shift operation of Invalid bit in the left direction
11
15-bit shift operation of questionable bit in the left direction
12
9-bit shift operation of badReference bit in the left direction
13
11-bit shift operation of failure bit in the left direction
14
To align data bits
15
Collection of Serious error signal
16
Collection of Minor error signal
17
Collection of Test mode signal
18
6-bit shift operation of inaccurate bit in the left direction
19
4-bit shift operation of test bit in the left direction
20
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to ○ .
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6F2S1914 (0.49)
GRL200 (Soft 033 & 037)