Pcie Interfaces - Quectel SG865W Series Hardware Design

3. It is recommended to use resistor divider circuit for ADC application.

4.7. PCIe Interfaces

The module provides 2 integrated PCIe (Peripheral Component Interconnect Express) interfaces. The
key features of the PCIe interfaces are mentioned below:
⚫
PCI Express Base Specification Revision 3.0 compliance.
⚫
Data rate at 8 Gbps per lane.
⚫
Can be used to connect to an external Ethernet IC (MAC and PHY) or WLAN IC.
Table 21: Pin Definition of PCIe Interfaces
Pin Name
PCIE1_REFCLK_P
PCIE1_REFCLK_M
PCIE1_TX0_P
PCIE1_TX0_M
PCIE1_RX0_P
PCIE1_RX0_M
PCIE1_TX1_P
PCIE1_TX1_M
PCIE1_RX1_P
PCIE1_RX1_M
PCIE1_WAKE_N
PCIE1_RST_N
PCIE1_CLKREQ_N
PCIE2_REFCLK_P
PCIE2_REFCLK_M
SG865W_Series_Hardware_Design
Pin No. I/O
267 DO
273 DO
281 DO
280 DO
275 DI
274 DI
269 DO
268 DO
264 DI
263 DI
287 DI
293 DO
299 DI
395 DO
396 DO
Description
PCIe1 reference clock (+)
PCIe1 reference clock (-)
PCIe1 transmit 0 (+)
PCIe1 transmit 0 (-)
PCIe1 receive 0 (+)
PCIe1 receive 0 (-)
PCIe1 transmit 1 (+)
PCIe1 transmit 1 (-)
PCIe1 receive 1 (+)
PCIe1 receive 1 (-)
PCIe1 wake up host
PCIe1 reset
PCIe1 clock request
PCIe2 reference clock (+)
PCIe2 reference clock (-)
Smart Module Series
Comment
85 Ω differential
impedance.
85 Ω differential
impedance.
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