Table of Contents
Advertisement
CSI5_CLK_P
CSI5_CLK_N
CS5_LN0_P
CSI5_LN0_N
CSI5_LN1_P
CSI5_LN1_N
CSI5_LN2_P
CSI5_LN2_N
CSI5_LN3_P
CSI5_LN3_N
CAM0_MCLK
CAM1_MCLK
CAM2_MCLK
CAM3_MCLK
CAM4_MCLK
CAM5_MCLK
CAM6_MCLK
CAM0_RST
CAM1_RST
CAM2_RST
CAM3_RST
CAM4_RST
CAM5_RST
CAM6_RST
CCI0_I2C_SDA
SG865W_Series_Hardware_Design
335
AI
MIPI clock of camera 5 (+)
329
AI
MIPI clock of camera 5 (-)
MIPI lane 0 data of
352
AI
camera 5 (+)
MIPI lane 0 data of
351
AI
camera 5 (-)
MIPI lane 1 data of
346
AI
camera 5 (+)
MIPI lane 1 data of
345
AI
camera 5 (-)
MIPI lane 2 data of
340
AI
camera 5 (+)
MIPI lane 2 data of
339
AI
camera 5 (-)
MIPI lane 3 data of
334
AI
camera 5 (+)
MIPI lane 3 data of
333
AI
camera 5 (-)
118
DO
Master clock of camera 0
112
DO
Master clock of camera 1
107
DO
Master clock of camera 2
99
DO
Master clock of camera 3
96
DO
Master clock of camera 4
108
DO
Master clock of camera 5
100
DO
Master clock of camera 6
119
DO
Reset of camera 0
114
DO
Reset of camera 1
109
DO
Reset of camera 2
103
DO
Reset of camera 3
115
DO
Reset of camera 4
110
DO
Reset of camera 5
104
DO
Reset of camera 6
151
OD
I2C data of CCI0
Smart Module Series
78 / 117
Advertisement
Table of Contents
