Quectel SG865W Series Hardware Design page 32

DSI0_LN3_N 379
DSI1_CLK_P 363
DSI1_CLK_N 368
DSI1_LN0_P 378
DSI1_LN0_N 384
DSI1_LN1_P 374
DSI1_LN1_N 381
DSI1_LN2_P 369
DSI1_LN2_N 377
DSI1_LN3_P 364
DSI1_LN3_N 373
Camera Interfaces
Pin Name Pin No.
CSI0_CLK_P 255
CSI0_CLK_N 258
CSI0_LN0_P 266
CSI0_LN0_N 265
CSI0_LN1_P 261
CSI0_LN1_N 260
CSI0_LN2_P 257
CSI0_LN2_N 256
CSI0_LN3_P 254
SG865W_Series_Hardware_Design
LCD0 MIPI lane 3
AO
data (-)
AO LCD1 MIPI clock (+)
AO LCD1 MIPI clock (-)
LCD1 MIPI lane 0
AO
data (+)
LCD1 MIPI lane 0
AO
data (-)
LCD1 MIPI lane 1
AO
data (+)
LCD1 MIPI lane 1
AO
data (-)
LCD1 MIPI lane 2
AO
data (+)
LCD1 MIPI lane 2
AO
data (-)
LCD1 MIPI lane 3
AO
data (+)
LCD1 MIPI lane 3
AO
data (-)
I/O Description
MIPI clock of camera
AI
0 (+)
MIPI clock of camera
AI
0 (-)
MIPI lane 0 data of
AI
camera 0 (+)
MIPI lane 0 data of
AI
camera 0 (-)
MIPI lane 1 data of
AI
camera 0 (+)
MIPI lane 1 data of
AI
camera 0 (-)
MIPI lane 2 data of
AI
camera 0 (+)
MIPI lane 2 data of
AI
camera 0 (-)
MIPI lane 3 data of
AI
camera 0 (+)
DC Characteristics Comment
85 Ω differential impedance.
Smart Module Series
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