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DP_AUX_P/M
USB0_DP/M
USB_CC1/CC2
USB_VBUS
UART5_CTS
UART5_RTS
GND
The reference design for DisplayPort is shown below:
USB_VBUS
USB0_DM
USB0_DP
USB_CC1
USB_CC2
USB0 _ SS0 _RX_P
USB0 _ SS0 _RX_M
USB0 _ SS0 _TX_P
USB0 _ SS0 _TX_M
USB0 _ SS1 _RX_P
USB0 _ SS1 _RX_M
USB0 _ SS1 _TX_P
USB0 _
SS1
_TX_M
USB_SBU1
USB_SBU2
Module
SBU_SW_OE
VREG_S4A_1V8
DP_AUX_P
DP_AUX_M
LDO2A_3V1
SBU_SW_SEL
Module
SG865W_Series_Hardware_Design
SBU1/2
USB1_DP/M
USB_CC1/CC2
USB_VBUS
-
-
GND
0R
0R
R1
0.1 μF
C1
0.1 μF
C2
R1
R3
100K
100K
Figure 15: Reference Design for DisplayPort Mode
DP_AUX_P/N
USB1_DP/M
HOTPLUG_DET/VCONN
USB_VBUS
SBU_SW_OE
SBU_SW_SEL
GND
C1
C2
C3
C4
C5
C6
C7
C8
2.2K
OE
VCC
HSD2+
HSD2-
HSD1+
GND
HSD1-
SGM7227YMS10G/TR
Smart Module Series
USB_VBUS
D-
D+
CC1
CC2
RX1+
RX1 -
TX1+
TX1 -
RX2+
RX2 -
TX2+
TX2-
SBU1
SBU1
SBU2
SBU2
USB Type-C
VDD_3V3
1 μF
C3
S
D+
SBU1
D-
SBU2
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