Quectel SG865W Series Hardware Design page 68

NOTE
The reference design of PCIe2 interface is similar to PCIe1 interface.
The following principles of PCIe interface design should be complied with to meet PCIe specifications.
⚫
It is important to route the PCIe signal traces as differential pairs with ground surrounded. The
differential impedance is 70–100 Ω and 85 Ω is recommended.
⚫
PCIe signals must be protected from noisy signals (clocks, DC-DC, RF and so forth). All other
sensitive/high-speed signals and circuits must be routed far away from PCIe traces.
⚫
The total trace length of each signal should be less than 300 mm.
⚫
For each differential pair, intra-lane length match (P/M) should be less than 0.7 mm.
⚫
Inter-lane length match, that is, the trace length matching between the reference clock, Tx, and Rx
pairs is not required.
⚫
The spacing between Tx and Rx, and the spacing between PCIe lanes and all other signals, should
be larger than 4 times of the trace width.
⚫
PCIe Tx AC coupling capacitors can be anywhere along the line, but better to be placed close to
source or connector side to keep good SI of main route on PCB.
⚫
Ensure not to stagger the capacitors. This can affect the differential integrity of the design and can
create EMI.
⚫
PCIe Tx AC coupling capacitors should be 220 nF for Gen 3, and 100 nF is recommended for Gen 2
application.
⚫
In the case of trace serpentines, one trace of a differential pair must be routed to make up a length
delta, then it must be routed at the source (breakout) – this ensures that traces stay differential
thereafter.
⚫
To reduce the probability for layer-to-layer manufacturing variation, minimize layer transitions on the
main route (in other words, apply layer transitions only at module breakouts and connectors to
ensure minimum layer transitions on the main route).
Table 22: PCIe Trace Length Inside the Module
Signal
PCIE1_REFCLK_P
PCIE1_REFCLK_M
PCIE1_TX0_P
PCIE1_TX0_M
PCIE1_RX0_P
SG865W_Series_Hardware_Design
Pin No. Length (mm)
267 20.16
273 20.42
281 9.26
280 9.33
275 22.55
Smart Module Series
Length Difference (mm)
-0.26
-0.07
0.3
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