Quectel SG865W Series Hardware Design page 30

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PCIE1_RX1_M
263
PCIE1_WAKE_N
287
PCIE1_RST_N
293
PCIE1_CLKREQ_N
299
PCIE2_REFCLK_P
395
PCIE2_REFCLK_M
396
PCIE2_TX0_P
388
PCIE2_TX0_M
389
PCIE2_RX0_P
391
PCIE2_RX0_M
392
PCIE2_TX1_P
390
PCIE2_TX1_M
394
PCIE2_RX1_P
393
PCIE2_RX1_M
398
PCIE2_WAKE_N
370
PCIE2_RST_N
404
PCIE2_CLKREQ_N
399
Touch Panel Interfaces
Pin Name
Pin No.
TP0_RST
455
TP0_INT
449
TP0_I2C_SCL
454
TP0_I2C_SDA
460
TP1_RST
421
TP1_INT
427
TP1_I2C_SCL
409
SG865W_Series_Hardware_Design
DI
PCIe1 receive 1 (-)
DI
PCIe1 wake up host
DO
PCIe1 reset
DI
PCIe1 clock request
PCIe2 reference
DO
clock (+)
PCIe2 reference
DO
clock (-)
DO
PCIe2 transmit 0 (+)
DO
PCIe2 transmit 0 (-)
DI
PCIe2 receive 0 (+)
DI
PCIe2 receive 0 (-)
DO
PCIe2 transmit 1 (+)
DO
PCIe2 transmit 1 (-)
DI
PCIe2 receive 1 (+)
DI
PCIe2 receive 1 (-)
DI
PCIe2 wake up host
DO
PCIe2 reset
DI
PCIe2 clock request
I/O
Description
DO
TP0 reset
DI
TP0 interrupt
OD
TP0 I2C clock
OD
TP0 I2C data
DO
TP1 reset
DI
TP1 interrupt
OD
TP1 I2C clock
85 Ω differential impedance.
DC Characteristics
Comment
1.8 V power domain.
Smart Module Series
29 / 117

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