Camera Interfaces - Quectel SG865W Series Hardware Design

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TP0_I2C_SDA
TP0_I2C_SCL
Module
NOTE
The reference design of TP1 interface is similar to TP0 interface.

4.14. Camera Interfaces

Based on the standard MIPI CSI video input interface, the module supports 7 cameras, and the maximum
pixel of the camera can be up to 64 MP. The video and photo quality are determined by various factors
such as the camera sensor, camera lens quality, etc. CCI_I2C/I3C signals are controlled by Linux Kernel
code and support connection with video output related devices.
Table 29: Pin Definition of Camera Interfaces
Pin Name
CSI0_CLK_P
CSI0_CLK_N
CSI0_LN0_P
CSI0_LN0_N
CSI0_LN1_P
CSI0_LN1_N
SG865W_Series_Hardware_Design
LDO1C_1V8
R1
2.2K
TP0_RST
TP0_INT
D1
D2
GND
Figure 23: Reference Design for TP0 Interface
Pin No.
I/O
Description
255
AI
MIPI clock of camera 0 (+)
258
AI
MIPI clock of camera 0 (-)
MIPI lane 0 data of
266
AI
camera 0 (+)
MIPI lane 0 data of
265
AI
camera 0 (-)
MIPI lane 1 data of
261
AI
camera 0 (+)
MIPI lane 1 data of
260
AI
camera 0 (-)
LDO13A_3V0
R2
2.2K
D4
D3
C1
C2
4.7 μF 100 nF
Smart Module Series
1
SDA
2
SCL
3
RESET
4
INT
5
GND
6
VDD
D5
TP
Comment
75 / 117

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