Pcie Interface - Quectel FC64E Hardware Design

Table 6: Pin Definition of WLAN_EN
Pin Name Pin No.
WLAN_EN 13

3.5.2. PCIe Interface

The module provides a PCIe interface with key features listed as below:
PCI Express Specification Revision 3.0 compliance.

X1 link width, transmission rate up to 8 Gbps.

As Wi-Fi function interface to connect to a host.

Table 7: Pin Definition of PCIe Interface
Pin Name
PCIE_REFCLK_M
PCIE_REFCLK_P
PCIE_TX_M
PCIE_TX_P
PCIE_RX_M
PCIE_RX_P
PCIE_CLKREQ_N
PCIE_RST_N
PCIE_WAKE_N
The following figure shows the PCIe interface connection between the module and the host.
FC64E_Hardware_Design
I/O Description
WLAN function enable
DI
control
Pin No. I/O Description
1 AI PCIe reference clock (-)
2 AI PCIe reference clock (+)
4 AO PCIe transmit (-)
5 AO PCIe transmit (+)
7 AI PCIe receive (-)
8 AI PCIe receive (+)
10 DO PCIe clock request
11 DI PCIe reset
12 DO PCIe wakes up
Wi-Fi&Bluetooth Module Series
Comment
1.8 V power domain.
Active high.
Do not float this pin.
Comment
Require differential
impedance of 85 Ω.
1.8 V power domain.
Active low.
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