Quectel SG865W Series Hardware Design page 60

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VREG_S4A_1V8
100 pF
UART 5_ CTS
UART 5_ RTS
UART5_ TXD
UART5_ RXD
Figure 16: Reference Circuit with Voltage-level Translator Chip (for UART 5)
When the module communicates with PC, voltage-level translator is also required. A voltage-level
translator chip and an RS-232 translator chip are recommended to be added. The following figure shows
a corresponding reference design.
UART5_TXD
UART5_RTS
UART5_RXD
UART5_CTS
GND
Module
NOTE
Debug UART, UART16 and UART17 are similar to UART5. For the reference designs, refer to that of
UART5.
SG865W_Series_Hardware_Design
VCCA
C1
OE
A1
A2
A3
A4
1.8 V
OE
VCCA
VCCB
TXD_3.3V
TXD_1.8V
RTS_3.3V
RTS_1.8V
RXD_1.8V
RXD _3.3V
CTS _3.3V
CTS_1.8V
GND
TXS0104 EPWR
Figure 17: RS-232 Level Matching Circuit (for UART 5)
VCCB
U1
GND
B1
B2
TXS0104EPWR
B3
B4
3.3 V
VCC
DIN 1
DIN 2
DIN 3
DIN 4
DIN 5
R1OUTB
ROUT1
ROUT 2
ROUT3
FORCEON
3.3V
/FORCEOFF
SN65C 3238
Smart Module Series
VDD_3.3V
C2
100 pF
CTS_3.3V
RTS_3.3V
TXD_3.3V
RXD_3.3V
GND
GND
DOUT1
RXD
DOUT2
CTS
DOUT3
DOUT4
DOUT5
TXD
RIN1
RIN2
RTS
RIN3
/INVALID
DB-9
59 / 117

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