I2S Interfaces - Quectel SG865W Series Hardware Design

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WSA_SWR_DATA
WCD_RST
WCD_SWR_TX_CLK
WCD_SWR_TX_DATA0
WCD_SWR_TX_DATA1
WCD_SWR_RX_CLK
WCD_SWR_RX_DATA0
WCD_SWR_RX_DATA1
LPI_DMIC3_CLK
LPI_DMIC3_DATA

4.17. I2S Interfaces

The module provides three I2S interfaces which can support TDM function and also can be multiplexed to
PCM. For more details about PCM interface, see document [2]. The following table shows the pin
definition.
Table 35: Pin Definition of I2S Interfaces
Pin Name
LPI_MI2S1_SCLK
LPI_MI2S1_WS
LPI_MI2S1_DATA0
LPI_MI2S1_DATA1
MI2S0_MCLK
MI2S0_SCLK
MI2S0_WS
MI2S0_DATA0
SG865W_Series_Hardware_Design
49
DIO
88
DO
92
DO
91
DO
87
DO
82
DO
85
DI
81
DI
46
DO
52
DI
Pin No.
I/O
62
DO
58
DO
67
DIO
61
DIO
63
DO
64
DO
80
DO
70
DIO
Smart Module Series
WSA SoundWire data
WCD reset
WCD SoundWire transmit clock
WCD SoundWire transmit data 0
WCD SoundWire transmit data 1
WCD SoundWire receive clock
WCD SoundWire receive data 0
WCD SoundWire receive data 1
LPI digital MIC3 clock
LPI digital MIC3 data
Description
LPI MI2S1 bit clock
LPI MI2S1 word select
LPI MI2S1 Data channel 0
LPI MI2S1 Data channel 1
MI2S0 master clock
MI2S0 bit clock
MI2S0 word select
MI2S0 data channel 0
88 / 117

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