Quectel SG865W Series Hardware Design page 47

Smart Module Series
3 A
Input current
3.8 V
Voltage
Figure 5: Voltage Drop Sample
To prevent the voltage from dropping below 3.1 V, use a bypass capacitor of about 100 µF with low ESR
(ESR = 0.7 Ω), and reserve a multi-layer ceramic chip capacitor (MLCC) array due to its ultra-low ESR. It
is recommended to use four ceramic capacitors (10 μF, 100 nF, 33 pF, 10 pF) to compose the MLCC array,
and place four capacitors close to VBAT pins. The width of VBAT trace should be no less than 3 mm. In
principle, the longer the VBAT trace is, the wider it should be.
In addition, to get a stable power source, it is suggested to use a 2000 W TVS and place it as close to the
VBAT pins as possible to enhance surge protection.
The following figure shows the structure of the power supply.
VBAT
VBAT
+
C4 C5
C2 C3
C1
D1
Module
10 μF
100 μF 100 nF
33 pF 10 pF
GND
Figure 6: Structure of Power Supply
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