HP 3000 III Series Manual page 59

System/CPU Overview
Calling the procedure causes a four-word stack marker to be
placed on the stack as shown in figure 2-11. The marker format
is shown in figure 2-12. The first \\ ord saves the current con-
tents of the Index Register (X Register). The second word saves
the return address for the code segment (P Register address plus
one relative to the PB Register contents). The third word saves
the STA Register contents (M, I, T, R, 0, C, and CC) and the code
segment number of the caller in case the called procedure is
external to the current code segment. The fourth word contains a
value called Delta Q which designates how far back it is to the
previous location to which the
Q
Register was pointing. In th is
case, Delta Q is pointing to First Q.
The Q Register now
points
at this Delta Q location.
The previously described sequence of events are repeated when
Procedure B (f igure 2-11) and Procedure C are called. Each time,
the Q Register will point to the Delta Q llocation of the current
stack marker and the contents of that location will point to the
previous Q setting.
Therefore, when Procedure C is executing,
there is a chain of Delta Q stack marks linking the present Q
set t i ng b a c k to th e Fi r s t
Q.
The links are used and eliminated as the procedures are exited
the same as they were established when the procedures were
called. When Procedure C ends, the EXIT instruction returns S to
equal
Q,
essentially placing the Delta Q value temporarily on the
TOS. This allows the EXIT instruction to compute a new value for
the
Q
Register (Previous
Q)
and it appropriately moves
Q
back.
The EXIT instruction causes S to decrement step-by-step through
the stalck marker, restoring status, P Register contents, and X
Register contents for Procedure B.
Lastly, S is moved back to eliminate the unwanted parameters of
Procedure C. Presumably, one or more parameters will be answers
computed by procedure C and, therefore, S is only moved back so
far astc preserve the desired answers which are now on the TOS.
The sequence of events discribed in the last two paragraphs is
repeated until all stack marks are eliminated and only the final
answer is on the TOS. For additional information on stack oper-
ations, refer to paragraph 4-17.
2-29. INSTRUCTION AND STATUS WORD FORMATS
2-30. Instruction Formats
The machine instruction set is designed for maximum efficiency of
bit usage in the instruction words and, therefore, the instruc-
tion formats do not necessarily fall into rigid field boundries.
There are 23 distinct instruction set formats. In addition to
the instruction formats, there are 13 instruction groups as shown
in figure 2-13. The formats of the individual instruction groups
are discussed in paragraphs 2-31 through 2-44. For additional
information, refer to section IV.
2-27