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In te r r up t Sy s te m
d.
The P Reg ister is se t fr om the local label,
reached via
the
STT
entry in
the External Program Label,
thus transferring
control to the internal interrupt code segment (2).
8-7. Non-ICS Internal Interrupts
The non-ICS type interrupts operate on the current user's
stack.
Referring to figure 8-2, the overall operation is as follows:
a.
A special
condition is detected and causes the
CPU
to save
the
user's environment on his own stack and to fetch the CST
entry 1 (1) by creating an External Program Label to the code
for processing the interrupt.
b.
The PB and PL Registers are set up based on CST entry 1.
c.
The Status Register is set to Privileged Mode, Segment 1 with
all other bits cleared (%100001).
d.
The P Reg iste r is se t fr om the local label,
rea ched via
the
STT
entry in
the External Program Label,
thus transferring
control to the in te rnal inte rr upt code segment (2).
8-8. EXTERNAL INTERRUPT PROCESSING
Prior to discussing
the
sequence
of
operations
for
external
interrupts,
there
are
two
important factors that must be con-
sidered; interrupt priorities
and
interrupt
program" pointers.
Servicing
of
external
interrupts is accomplished in descending
order of priority (i.e., the highest priority is serviced first).
A higher priority interrupt can always interrupt
the
processing
of a lower priority.
8-9. Interrupt Priorities
The interrupt
priority of a device is completely
independent of
the device number. It is determined by the device's logical prox-
imity to the lOP on the interrupt poll line.
The interrupt
poll
is
wired at system configuration time from one device controller
to another using twisted-pair, clip-on wires.
The routing of the
interrupt poll is determined by the desired interrupt
priorities
of
the device controllers and is completely independent of other
parameters.
Each device
controller therefore,
has a
distinct
priority level in relation to all other controllers.
The maximum
number of controllers and, hence interrupt levels, is 125.
8-10. Interrupt Program Pointer
The Device Reference Table (DRT) was defined in section VII.
As
previously discussed,
the second word of each DR!' entry contains
the interrupt program pointer.
This is an external program label
pointing to the start of the interrupt routine associated with
a
particular
device controller.
I t should be noted
that se veral
controllers could point to the same routine.
8-8
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