HP 3000 III Series Manual page 339

HP 3242lA Series III Power Supplies
-30 vol t rectifier output to a regulated -20 volt dc output. The
+20 and -20 volts dc are used by a power supply for the semicon-
ductor memory. An analog signal from the memory power supply is
used by the +20-vol t regulator to control the output vol tage.
The -20V-regulator is designed to track the +20-volt regulator so
that the two outputs are equal and opposite in polarity.
9-10. Current LimiterA4
The current limiter circuits monitor the individual dc voltage
drops across the output filter chokes for the +15, +5, -5 and -15
volt outputs. Anyexcessive current drawn from these outputs
results in the immediate generation of an Overcurrent signal.
The Overcurrent signal is used by the preregulator control cir-
cuit to limit' the preregulator output voltage to protect the pow-
er supply.
9-11. Voltage Protection and Control A5
The voltage protection and control circuits contain overvoltage
sensing circuits to protect the computer system hardware and
overvoltage sensing circuits to protect system software. The
overvoltage comparator circuits monitor all dc output voltages,
with the exception of the +20 volt output. When an overvoltage
condition is sensed, an overvoltage latch is set. Transformer-
coupled crowbar trigger pulses are generated which crowbar the
+130V RAIL, +20, -20, +5, and -5 volt dc outputs. Also, when the
latch is set, the Inverter Up (INU) goes low and disables the
inverters and preregulator. Circuits also monitor the internal
thermal cutout switch (overtemperature sense) and the external
Dc
Enable (DCE) signal. If the internal power supply temperature
exceeds its fixed limit or an external DeE signal is removed, the
Power Fail Warning (PFW) signal goes low after a 70-ms delay.
After another delay of 12 ms, the INU-signal goes low, turning
the preregulator and inverter off. Since the output voltages go
down, the Power Supply On (PON) signal goes low. The SYSTEM
switch controls the power supply outputs with the DCE signal.
This signal appears as an overtemperature condition to the power
supply and initiates the overtemperature sequence.
The undervoltage comparator circuits monitor all output voltages
with the exception of the +20-volt output. If any of these dc
output voltages drop below specified limits, the PON signal goes
low. An excessive current overload causes the output dc voltages
to drop. The undervoltage sequence i~ initiated due to this
condition. Circuits also monitor the input ac 1 ine voltage. If
it drops below a preset limit, the PFW signal goes low and, after
a minimum delay of 5 ms, the PON signal also goes low. When the
dc output voltages and ac line voltage are above the specified
low limits and the thermal switch is closed, a high PON signal is
provided for the system within 0.6 second.
9-5