HP 3000 III Series Manual page 46

System/CPU Overview
The DB Register defines the data base of the current use r 's
stack. The DB Register contains a 16-bit absolute address point-
ing to the first memory location of the directly addressable glo-
bal area of the stack.
The DB-Bank Register is a 4-bit register used in conjunction with
the DB Register to define in which memory bank the stack or split
stacks (paragraph 2-64) reside.
The
Q
Register defines the current stack marker in the current
data segment. The area of the stack between Q and S represents
data that is incurred by the current procedure or routine. The
Q
Register contains a 16-bit absolute address pointing to the
fourth word of the current stack marker being used within the
stack. The location pointed to by the Q Register must be within
the limits defined by the DB Register and Z Register. (Dur ing
privileged mode (paragraph 247), Q can be moved below DB.
The SM Register defines the last memory location of the current
stack. The SM Register contains a 16-bit absolute address point-
ing to the last accessed data location in memory. It should be
noted that the contents of the SM Register may not necessarily
point to the actual (or logical) TOS. The location pointed to by
the SM Register must be within the limits defined by the DB Reg-
is te rand
Z
Re g i s te r •
The SR Register defines the number of TOS elements that are in
the CPU stack registers. The SR Register contains a 3-bit number
that has a value from
0
and 4. This number is a positive dis-
placement which, when added to the address contained in the
SM Register, indicates the logical TOS. (The contents of the
8M Register plus the contents of the SR Register always defines
the S-p ointe r. )
The S-pointer is not a physical register, but is logically com-
posed by adding together the contents of the SM Register and
SR Register. The S-pointer always defines the logical TOS. (The
principle of using two physical registers to create the S-pointer
is employed for hardware convenience in achieving fast execution
times.) The following relationship exists between the S-pointer
and the CPU stack registers:
RA
RB
RC
RD
= S-pointe r
=
SR Register
+
SM Registe r
= S-pointer 1
= S-pointer 2
= S-pointe r 3
The Z Register defines the stack limit of the current user's
stack. The Z Register contains a 16-bit absolute address point-
ing to the last memory location available to the stack. (Actual-
ly, each data segment has several locations beyond
Z
that are
used for bounds checks (paragraph 2-65) and stack markers due to
an interrupt (paragraph 2-28).
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