Cpu Servicing Information; Read-Only Memory (Rom) Pca - HP 3000 III Series Manual

System/CPU Overview
2-127. INTERRUPT STATUS REGISTER 1 (CPXl). The Interrupt Status 1
Register (CPXl Register) provides 16 bits that are used to monit-
or the system Run Mode interrupt status. When a Run Mode inter-
rupt occurs, the CPU reads the CPXl Register and checks its con-
tents for the cause of the interrupt. The CPXl Register is read
by S-Bus field code CPXl and is affected by Special field code
CCPX as discussed in Section V. Each of the CPXl Register's 16
bits (when true) signifies a specific Run Mode interrupt as fol-
lows:
Bit
o:
Inte ger Overflow
Bit 8: Ex ternal Interrupt
Bit 1: Bounds Viola tion
Bit 9: Power Fail Inte rrupt
Bit 2: Illegal Address
Bit 10 : 0
Bit 3 : CPU Timer
Bit 11 : ICS Flag
Bit 4: Sys tern Par i ty Error
Bit 12 : DISP Flag
Bit 5: Address Par i ty Er ror Bit 13 : Emulator
Bit 6: Data Par ity Error Bit 14 : I/O Timer
Bit 7: f\1od ule Interrupt Bit 15: Option Present
2-128. INTERRUPT STATUS REGISTER 2 (CPX2). The Interrupt Status 2
Register (CPX2 Register) is used to monitor the system's Halt
Mode interrupt status. When a Halt Mode interrupt occurs, the
CPU reads the CPX2 Register and checks its contents for the cause
of the interrupt. The CPX2 Register is read by S-Bus field code
CPX2 and is affected by Special field code CCPX as discussed in
Section V. Each of the CPX2 Register's 16 bits (when true) sig-
nifies a specific Halt Mbde interrupt as follows:
Bit 0: Run Sw i tc h
Bit 1 : Dump Sw itch
Bit 2: Load Switch
Bit 3: Load Register
Bit 4: Load Address
Bit 5: Load Memory
Bit 6: Display Memory
Bit 7: Single Instruction
2-129. CPU Servicing Information
Bit 8: Execute Switch
Bi t 9: Increment Address
Bit 10: Decrement Address
Bit 11: 0
Bi
t
12: 0
Bit 13: Inhibit PFARS
Bit 14: System Halt
Bit 15: Run Flip-Flop
Physically, the basic CPU consists of the nine PCA's contained in
slots A2 through AlO of card Cage No. 1 as shown in tables 1-1
through 1-3. All CPU PCA's are nonrepairable PCA's and must be
replaced if found defective. No repair procedures are required.
However, four of the six CPU PCA's contain jumpers or switches
that must be properly configured as discussed in paragraphs 2-130
through 2-133.
2-130. READ-ONLY MEMORY (ROM) PCA. The ROM PCA contains four
jumpers (W5 through W8) that must be installed to reflect the
type of ROM's loaded on the PCA. If the ROM PCA is loaded with
ROM's having a capacity of lK words, install the four jumpers
nearest the lK marking as shown in figure 2-21. If the ROM PCA
is loaded with ROM's having a capacity of 2K words, install the
four jumpers nearest the 2K marking.
2-61