HP 3000 III Series Manual page 190

System Microcode
Table 5-3. S-Bus Field Code Definitions (Continued)
I---'--~---'---T----"---I--'---'-'------'--'--------------------·--1
i
Field I I
I
Label and Name Cbde I Description I
I I I
-----------------.---- ------ ----.--------------- ---------------1
lOA 01001 The a-bit content of the ION Regis-I
(I/O Address) ter is loaded into bits a thru 15
1
of the S-Bus Register. Bits 0 thru
7 of the S-Bus Register become
zeros.
100
01010
(I/O Data)
MOD 00101
(Module Number)
NOP 11111
(No Operation)
OPND 10110
(Ope rand)
The l6-bit content of the Direct
Input Da ta (DID/MUXMA) Reg ister in
the lOP is loaded into the S-Bus
Register.
The MOD S-Bus field code provides
the CPU with two pieces of infor-
mation. When executed, the 4-bit
content of the IMN Register is
loaded into bits 4 thru 7 of the
S-Bus Register. Also, bit 13 of
the S-Bus Register becomes a
1, in-
dicating MOD 1. These bit are used
to fetch the correct Ql and Zl en-
tries in the CST. All other bits
of the S-Bus Register become zeros.
No operation.
The 16-bit content of the OPND Reg-
ister is loaded into the S-Bus Reg-
ister. An attempt to execute an
OPND while an MCU operand directed
operation is in progress results in
a CPU freeze until the MCU opera-
tion is complete.
PB 11110
(Program Base)
PADD 00010
(Program Base)
P 10000
(Program Counte
r)
The 16-bit content of the P Regis-
ter is loaded into the S-Bus Regis-I
te r.
I
I
The 16-bit output of the Pre-Adder
I
is loaded into the S-Bus Register.
1
I
The 16-bit content of the PB Reg- I
ister is loaded into the S-Bus Reg-I
i ste r. I
I
_- -__- - -_- -_.__.__- _ _,_-_- .
~
I
5-10