I2S Interfaces - Quectel SG368Z Series Hardware Design

I2C features:
⚫ Support I2C bus master mode
⚫ Support programmable clock frequency by software and the data rate is up to 400 kbps
⚫ Support 7-bit and 10-bit addressing modes
Table 17: Pins Description of I2C Interfaces
Pin Name
I2C2_SDA
I2C2_SCL
I2C3_SDA
I2C3_SCL
I2C4_SDA
I2C4_SCL
TP_I2C1_SCL
TP_I2C1_SDA

4.6. I2S Interfaces

SG368Z-WF supports up to 1 group of I2S interface; SG368Z-AP supports up to 2 groups of I2S
interfaces. 1 of them is configured by default and 1 of them is multiplexed from other interface, see
document [2].
I2S features:
⚫ Bit rate is from 16 bits to 32 bits
⚫ Sampling rate is up to 192 kHz
⚫ Support master or slave mode
⚫ Support I2S, PCM, TDM modes
⚫ Support PCM formats: early, late1, late2, late3
⚫ Support up to TDM 16 channels
⚫ I2S, PCM, TDM modes can not be used simultaneously
SG368Z_Series_Hardware_Design
Pin No. I/O
284 OD
287 OD
268 OD
273 OD
155 OD
159 OD
45 OD
40 OD
Smart Module Series
Description
I2C2 serial data
I2C2 serial clock
I2C3 serial data
I2C3 serial clock
I2C4 serial data
I2C4 serial clock
TP I2C clock
TP I2C data
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