Vol_Up/Boot - Quectel SG368Z Series Hardware Design

Smart module
Table of Contents

Advertisement

to ensure impedance continuity.
Pay attention to the impact caused by stray capacitance of the ESD protection component on USB
data traces. Typically, stray capacitance should be less than 3 pF for USB 2.0, and less than 0.4 pF
for USB 3.0.
Do not route USB 3.0 signal traces under RF signal traces. Crossing or being parallel with RF signal
traces is forbidden.
For USB 3.0 signal traces, length matching of each differential data pair (Tx/Rx) should be less than
0.3 mm.
For USB 3.0, the clearance between Rx and Tx signal traces should be 4 times the signal trace width.
The clearance between USB 3.0 signal traces and other signal traces should be 4 times the signal
trace width.
For USB 2.0 signal traces, the differential data pair matching (P/M) should be less than 0.5 mm.
For USB 2.0, the clearance between DP-DM signal traces and other signal traces should be 3 times
the signal trace width.

4.2. VOL_UP/BOOT

VOL_UP/BOOT is used to control the module to enter firmware upgrade mode. It is at high level by
default. On the premise that VOL_UP/BOOT is not pressed and the module has been burned with
firmware, VOL_UP/BOOT is used for the volume up function by default after the module is turned on. If
VOL_UP/BOOT button is pressed when the module is turned on, that is, VOL_UP/BOOT is kept at low
level, the module enters the Loader burning mode. When the PC recognizes the USB device, release the
button to restore the VOL_UP/BOOT to high level and then you can upgrade the firmware.
Table 13: Pins Description of VOL_UP/BOOT
Pin Name
VOL_UP/BOOT
SG368Z_Series_Hardware_Design
Pin No.
I/O
236
AI
Description
Volume up;
Control the module
into firmware
upgrade mode
Smart Module Series
Comment
Active low.
A test point is recommended to
be reserved.
45 / 113

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sg368z-wfSg368z-ap

Table of Contents