Quectel SG368Z Series Hardware Design page 65

CSI_CLK1_N
CSI_CLK1_P
CSI_LN0_N
CSI_LN0_P
CSI_LN1_N
CSI_LN1_P
CSI_LN2_N
CSI_LN2_P
CSI_LN3_N
CSI_LN3_P
CAM0_MCLK
CAM0_RST
CAM0_PWDN
CAM1_MCLK
CAM1_RST
CAM1_PWDN
SG368Z_Series_Hardware_Design
6 AI
9 AI
7 AI
8 AI
4 AI
5 AI
16 AI
17 AI
11 AI
12 AI
279 DO
317 DO
316 DO
75 DO
314 DO
313 DO
Smart Module Series
MIPI CSI clock 1 (-)
MIPI CSI clock 1 (+)
MIPI CSI lane 0 data (-)
MIPI CSI lane 0 data (+)
MIPI CSI lane 1 data (-)
MIPI CSI lane 1 data (+)
MIPI CSI lane 2 data (-)
MIPI CSI lane 2 data (+)
MIPI CSI lane 3 data (-)
MIPI CSI lane 3 data (+)
Master clock of camera 0
Reset of camera 0
Power down of camera 0
Master clock of camera 1
Reset of camera 1
Power down of camera 1
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