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SD_PU_VDD
SD_DATA2
SD_DATA3
SD_CMD
SD_CLK
SD_DATA0
SD_DATA1
SD_DET
Module
SD_VDD is a peripheral driver power supply for SD card. The maximum drive current is 600 mA. Because
of the high drive current, it is recommended to keep the trace width as at least 0.6 mm. To ensure the
stability of drive power, you should add a 4.7-μF and a 33-pF capacitor in parallel near the SD card
connector.
SD_CMD, SD_CLK and SD_DATA[0:3] are all high-speed signal traces. In PCB design, control the
characteristic impedance of these traces as 50 Ω, shield them and do not cross them with other traces. It
is recommended to route these traces on the inner layer of PCB and keep their lengths the same.
Additionally, SD_CLK needs separate ground shielding.
Layout guidelines:
⚫
Control impedance to 50 Ω ± 10 %, and add ground shielding.
⚫
Trace length matching between SD_CLK and SD_CMD/SD_DATA should be less than 3 mm.
⚫
Trace length requirements: less than 150 mm when SD_CLK frequency is less than or equal to
50 MHz; less than 100 mm when SD_CLK frequency is greater than 50 MHz.
⚫
Clearance between SD card signal traces should be greater than or equal to 2 times the trace width
and the clearance between SD card signal traces and other signal traces should be greater than or
equal to 3 times the trace width.
⚫
The load capacitance requirements of SD_DATA[0:3], SD_CLK and SD_CMD traces: less than 9 pF
for SD 2.0; less than 1 pF for SD 3.0.
SG368Z_Series_Hardware_Design
242
PO
LDO6_3V3
R1
R2
R3
NM_100K
NM_51K
NM_51K NM_10K NM_51K NM_51K
R7
33R
R8
33R
R9
33R
R10
33R
R11
33R
R12
33R
R13
100R
D1
D2
D3
Figure 11: Reference Design of SD Card Interface
1.8/3.3 V output power for
SD card pull-up circuits
SD_VDD
SD_PU_VDD
R6
R4
R5
C1
D4
D5
D7
D6
4.7 μF
Smart Module Series
1
P1-DAT2
2
P2-CD/DAT3
3
P3-CMD
4
P4-VDD
5
P5-CLK
6
P6-VSS
7
P7-DAT0
8
P8-DAT1
9
DETECTIVE
10
GND
D8
C2
11
GND
12
33 pF
GND
13
GND
SD Card Connector
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