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Table 32: Pins Description of RGMII Interfaces
Pin Name
RGMII0_RX0
RGMII0_RX1
RGMII0_RX2
RGMII0_RX3
RGMII0_RX_CTL
RGMII0_RX_CLK
RGMII0_TX0
RGMII0_TX1
RGMII0_TX2
RGMII0_TX3
RGMII0_TX_CTL
RGMII0_TX_CLK
RGMII0_MDC
RGMII0_MDIO
RGMII0_
REFCLKOUT
RGMII0_MCLK
RGMII1_RX0
RGMII1_RX1
RGMII1_RX2
SG368Z_Series_Hardware_Design
Pin No.
I/O
Description
183
DI
RGMII0 receive data bit 0
179
DI
RGMII0 receive data bit 1
174
DI
RGMII0 receive data bit 2
169
DI
RGMII0 receive data bit 3
175
DI
RGMII0 receive control
164
DI
RGMII0 receive clock
168
DO
RGMII0 transmit data bit 0
173
DO
RGMII0 transmit data bit 1
178
DO
RGMII0 transmit data bit 2
182
DO
RGMII0 transmit data bit 3
172
DO
RGMII0 transmit control
163
DO
RGMII0 transmit clock
RGMII0 management data
181
DO
clock
RGMII0 management data
185
OD
input/output
RGMII0 reference clock
160
DO
output
177
DI
RGMII0 clock input
296
DI
RGMII1 receive data bit 0
294
DI
RGMII1 receive data bit 1
308
DI
RGMII1 receive data bit 2
Smart Module Series
Comment
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
Only SG368Z-AP supports
this pin.
The output frequency of
reference clock is 25 MHz.
The output frequency of
reference clock is 125 MHz;
Only SG368Z-AP supports
this pin.
75 / 113
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