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RGMII_TX and RGMII_RX are all high-speed signal traces. In PCB design, control the characteristic
impedance of these traces as 50 Ω, shield them and do not cross them with other traces. It is
recommended to route these traces on the inner layer of PCB and keep their lengths the same.
Additionally, RGMII_RX_CLK, RGMII_TX_CLK, RGMII_MCLK and RGMII_REFCLKOUT need separate
ground shielding.
Layout guidelines:
⚫
Control the differential impedance to 50 Ω ±10 % and shield them.
⚫
The trace length difference among RGMII_TX0, RGMII_TX1, RGMII_TX2, RGMII_TX3,
RGMII_TX_CTL and RGMII_TX_CLK should not exceed 3 mm.
⚫
The trace length difference among RGMII_RX0, RGMII_RX1, RGMII_RX2, RGMII_RX3,
RGMII_RX_CTL and RGMII_RX_CLK should not exceed 3 mm.
⚫
The total trace length of each RGMII signal should not exceed 125 mm.
⚫
Clearance between RGMII signal traces should be greater than or equal to 2 times the trace width
and the clearance between RGMII signal traces and other signal traces should be greater than or
equal to 3 times the trace width.
Table 33: RGMII Interface Trace Length Inside the Module (Unit: mm)
Pin Name
RGMII0_RX0
RGMII0_RX1
RGMII0_RX2
RGMII0_RX3
RGMII0_RX_CTL
RGMII0_RX_CLK
RGMII0_TX0
RGMII0_TX1
RGMII0_TX2
RGMII0_TX3
RGMII0_TX_CTL
RGMII0_TX_CLK
SG368Z_Series_Hardware_Design
Pin No.
183
179
174
169
175
164
168
173
178
182
172
163
Smart Module Series
Length (mm)
36.09
35.98
33.79
30.34
32.16
29.21
34.48
33.93
35.60
35.37
54.48
29.78
79 / 113
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