Quectel SG368Z Series Hardware Design page 31

Smart module
Table of Contents

Advertisement

Pin Name
I2S3_SCLK
I2S3_LRCK
I2S3_DOUT
I2S3_DIN
I2S3_MCLK
PDM_CLK1
PDM_DIN1
PDM_DIN2
PDM_DIN3
RF Antenna Interface
Pin Name
ANT_RF
ADC Interfaces
Pin Name
ADC2
ADC4
ADC5
ADC6
ADC7
Other Interfaces
Pin Name
EXT_EN
SG368Z_Series_Hardware_Design
Pin No.
I/O
Description
386
DO
I2S3 bit clock
388
DO
I2S3 channel select
380
DO
I2S3 data output
383
DI
I2S3 data input
376
DO
I2S3 master clock
258
DO
PDM clock 1
253
DI
PDM data input 1
248
DI
PDM data input 2
243
DI
PDM data input 3
Pin No.
I/O
Description
Wi-Fi/Bluetooth
206
AIO
antenna interface
Pin No.
I/O
Description
General-purpose
218
AI
ADC interface
General-purpose
233
AI
ADC interface
General-purpose
228
AI
ADC interface
General-purpose
223
AI
ADC interface
General-purpose
213
AI
ADC interface
Pin No.
I/O
Description
External device
217
DO
enable signal
Smart Module Series
DC
Comment
Characteristics
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO1
VCCIO1
VCCIO1
VCCIO1
DC
Comment
Characteristics
DC
Comment
Characteristics
Input voltage
range: 0~1.8 V
DC
Comment
Characteristics
After the module
is turned on, this
Vnom = VBAT
pin outputs a high
level.
30 / 113

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sg368z-wfSg368z-ap

Table of Contents