Uart - Quectel SG368Z Series Hardware Design

Table 15: SD Card Interface Trace Length Inside the Module (Unit: mm)
Pin Name Pin No.
SD_CLK 252
SD_CMD 247
SD_DATA0 246
SD_DATA1 251
SD_DATA2 256
SD_DATA3 257

4.4. UART

SG368Z-WF supports up to 8 groups of UART and SG368Z-AP supports up to 10 groups of UART. 6 of
them are configured by default, and the rest of them are multiplexed from other interfaces. For detailed
multiplexing relationship, see document [2].
UART features:
Each UART contains two 64-byte FIFOs for data reception and transmission
⚫
Support 115.2 kbps, 460.8 kbps, 921.6 kbps, 1.5 Mbps, 3 Mbps and 4 Mbps
⚫
⚫ Support programmable baud rate and non-integer clock divider
Support 5–8 bit width transmission
⚫
Table 16: Pins Description of UART
Pin Name
DBG_TXD
DBG_RXD
UART3_TXD
UART3_RXD
UART4_TXD
SG368Z_Series_Hardware_Design
Length
43.60
42.92
41.08
41.44
41.73
41.83
Pin No. I/O
374 DO
378 DI
339 DO
334 DI
344 DO
Length Matching with SD_CLK
-
0.68
2.52
2.16
1.87
1.77
Description
Debug UART transmit
Debug UART receive
UART3 transmit
UART3 receive
UART4 transmit
Smart Module Series
Comment
The default baud rate is
115200 bps.
Test points must be
reserved.
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