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DSI1_LN3_N
DSI1_LN3_P
NOTE
LVDS is multiplexed from DSI0. For the detailed multiplexing relationship, see document [2].
LCD1_RST (GPIO)
ADCx
DSI _LN3_P
DSI _LN3_N
DSI_LN2_P
DSI_ LN2_N
DSI_LN1_P
DSI _LN1_N
DSI_LN0_P
DSI_LN0_N
DSI_CLK_P
DSI_CLK_N
GND
Module
NOTE
The power supply of VIO18 can be either external ELDO1_1V8 or LDO9_1V8 of the module.
SG368Z_Series_Hardware_Design
23
AO
19
AO
LCM _ LED+
LCM _LED-
1
2
1
2
1
2
1
2
1
2
EMI filter
Figure 19: Reference Design of LCM Interface
LCD1 MIPI lane 3 data (-)
LCD1 MIPI lane 3 data (+)
ELDO2_2V8
ELDO1_1V8
C1
C2
1 μF
100 nF
FL1
3
4
FL2
3
4
FL3
3
4
FL4
3
4
FL5
3
4
Smart Module Series
1
LEDA
2
NC
3
LEDK
4
NC
5
LPTE
6
RESET
7
LCD_ID
8
NC (SDA-TP)
9
NC (SCL-TP)
C3
10
NC (RST-TP)
1 μF
11
NC (EINT-TP)
12
GND
13
VIO18
14
VCC28
15
NC (VTP-TP)
16
GND
17
MIPI_TDP3
18
MIPI_TDN3
19
GND
20
MIPI_TDP2
21
MIPI_TDN2
22
GND
23
MIPI_TDP1
24
MIPI_TDN1
25
GND
26
MIPI_TDP0
27
MIPI_TDN0
28
GND
29
MIPI_TCP
30
MIPI_TCN
31
GND
32
GND
33
GND
34
GND
LCM
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