Mpc823 Glueless System Design - Freescale Semiconductor PowerPC MPC823 Reference Manual

Introduction

1.8 MPC823 GLUELESS SYSTEM DESIGN

The MPC823 was primarily designed to make it easy for you to interface a microprocessor
with other system components. Figure 1-2 illustrates a system configuration that contains
one flash EPROM and yet supports DRAM SIMM and one SRAM. Although the MPC823
supports a glueless interface to DRAM, the capacitance of the system bus may require that
there be external buffers. From a logic standpoint, however, a glueless system is
maintained.
MPC823
PARITY[0:3]
ADDRESS
CS0
OE
GPL1/
WE[
0:3]
DATA
CS1
WR
RD/
CS2
Figure 1-2. MPC823 System Configuration
MPC823 REFERENCE MANUAL
8-BIT BOOT
EPROM/FLASH
ADDRESS
CE
CE
OE
OE
WE0
WE
DATA
DRAM
ADDRESS
RAS
CAS
[0:3]
W
W
DATA
PARITY[0:3]
SRAM
ADDRESS
CE
CE
OE
OE
WE
DATA