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3.11. UART
The UART serial communications interface supports up to two serial RX/TX ports supplied by the SOC. The two serial
ports are defined in the COMe specification on pins A98 (SERO_TX) and A99 (SERO_RX) for UART0, and pins A101
(SER1_TX) and A102 (SER1_RX) for UART1. Optionally it is possible that the two serial RX/TX ports are generated by
the Embedded Controller.
Two serial RX/TX ports from the SOC (PCIe based, non-legacy, no RTS/CTS) with an option
for two UART serial RX/TX ports alternatively from the Embedded Controller (available on
request as custom version).
3.12. Additional Features
Table 11: General, Special Kontron and Optional Features
General Features
10G Ethernet
PCI Express
Fast I2C
SPI
LPC
RTC
SM Bus
Special Kontron Features
Embedded API
TPM 2.0
GPIO
Watchdog Support
Optional Features (on request)
10G Ethernet
PCI Express
PCI Express
NVMe SSD
2
nd
SPI Flash
UART
SODIMM sockets
SODIMMs
www.kontron.com
PICMG COM.0 R3.1 compliance
PICMG COM.0 R3.1 compliance
Connected to module EEPROM, carrier EEPROM and RTC clock
SPI external boot
Used for external LPC on carrier board
Supported
Supported
KEAPI 3 for all Supported OS
KEAPI packages are included in reference image
1x TPM 2.0 (hardware)
Start-up level configurable, GPI interrupt capable
Dual staged
PICMG COM.0 R3.0 compliance
PICMG COM.0 R3.0 compliance
Enable PCIe x1 lanes on COMe PCIe #1, #3, #5
Up to 1 TByte NVMe PCIe SSD NAND Flash
On-module fail-safe 2
nd
SPI flash implemented for additional safety
2 UART serial RX/TX ports from Embedded Controller instead of
RX/TX ports from SOC (PCIe based, non-legacy, no RTS/CTS)
4x SODIMM sockets (2x on top side + 2x on bottom side)
Non-ECC SODIMMs are available on request
COMe-bID7 User Guide Rev. 1.2
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