Pci Express 4.0; Hsio Usage; Table 7: Soc - Pci Express Gen. 4.0 - Kontron COMe-bID7 User Manual

3.5. PCI Express 4.0

The SoC CPU supports 16x PCIe Gen 4.0 lanes used to support COMe PCIe #16-31 with one Root Complex (RPC) and
four Root Ports (RP) max.
Table 7: SoC – PCI Express Gen. 4.0
Module Function
COMe PCIE #16
COMe PCIE #17
COMe PCIE #18
COMe PCIE #19
COMe PCIE #20
COMe PCIE #21
COMe PCIE #22
COMe PCIE #23
COMe PCIE #24
COMe PCIE #25
COMe PCIE #26
COMe PCIE #27
COMe PCIE #28
COMe PCIE #29
COMe PCIE #30
COMe PCIE #31

3.6. HSIO Usage

The SoC PCH supports 24x HSIO lanes #0-23 (HSIO) which can be configured as PCIe Gen 3.0 lanes with up to 3 RPC, 4
RP per RPC (12 RPs max). The HSIO PCIE lanes are partly multiplexed with USB3.0 and SATA.
The HSIO lanes #0 -#15 are used as PCIe Gen 3.0 to support COMe PCIe #0 -15.
The HSIO lane #16 is used as PCIe Gen 3.0 for the onboard 1 /2.5 GbE Controller Intel i225.
The HSIO lane #18 is used as PCIe Gen 3.0 for an optional onboard NVMe SSD.
Alternatively the HSIO lanes #16, #18 and #22 can be used (by BOM option) to enable PCIe x1 lanes on COMe PCIe #0,
#3 and #5.
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SoC PCIE Lane Configuration
Function
x1 x2
PCIE 4.0 #0 -
PCIE 4.0 #1 -
PCIE 4.0 #2 -
PCIE 4.0 #3 -
PCIE 4.0 #4 -
PCIE 4.0 #5 -
PCIE 4.0 #6 -
PCIE 4.0 #7 -
PCIE 4.0 #8 -
PCIE 4.0 #9 -
PCIE 4.0 #10 -
PCIE 4.0 #11 -
PCIE 4.0 #12 -
PCIE 4.0 #13 -
PCIE 4.0 #14 -
PCIE 4.0 #15 -
x4 x8 x16
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
COMe-bID7 User Guide Rev. 1.2
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