Multimedia, History Status; Monitoring Status And I/O Access; Uart 3 Pnp Configuration - Kontron CPCI-MXS Technical Reference Manual

cPCI-MXS64 Technical Reference Manual

3.1.5 Multimedia, History Status

CPLD Address D7
READ n92h* NU
WRITE n92h* NU
Power-up Default
CLRHIS : When low, clear all history bits. Put this bit to 1 to enable history logging.
WD_LOCK : When high, lock the state of the enable bit for the digital watchdog

3.1.6 Monitoring Status and I/O Access

CPLD Address D7
READ n93h* NU
WRITE n93*h NU
Power-up Default
I2C_DATA : I2C data
I2C_CLK : I2C Clock
IDCHIP : One-wire clock/data for silicon ID chip

3.1.7 Uart 3 PnP Configuration

CPLD Address D7
READ n94*h CND3
WRITE n94*h CND3
Power-up Default 0
CND3 : When low, decode the base address.
CIS3_[1..0] : COM port interrupt select.
CBAS3_[1..0] : COM base address select.
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D6 D5 D4
NU NU NU
NU NU NU
D6 D5 D4
NU NU NU IDCHIP
NU NU NU IDCHIP
D6 D5 D4
CIS3_1 CIS3_0 CBAS3_ CBAS3_0 Reserve
1
CIS3_1 CIS3_0 CBAS3_ CBAS3_0 Reserve
1
0 0 0
3-4
D3 D2 D1
NU WD_LOCK NU CLRHIS
NU WD_LOCK NU CLRHIS
1
D3 D2 D1 D0
NU I2C_CLK I2C_DATA
NU I2C_CLK I2C_DATA
0 0 0
D3 D2 D1 D0
Reserve Reserve
d d
Reserve Reserve
d d
1 0 0
D0
1
d
d
1