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7/ Power Control
7.1. Power Supply
The COMe-bID7 supports a power input from 8.5 V to 20 V in the commercial grade version, but 12 V in the industrial
version. The supply voltage is applied through the VCC pins (VCC) of the module connector.
Optionally, 5 V +/- 5% can be applied to the V_5V_STBY pins and allows support for wake-up suspend-to-disk and
soft-off state when the VCC power is removed.
Suspend-to-RAM (S3) and Hibernate (S4) is not supported by the Xeon D-1700 product
family.
7.2. Power Supply Control Settings
The power supply control settings are set in the BIOS and enable the module to shut down, rest and wake from
standby properly.
Table 25: Power Supply Control Settings
Power Button
Pin
B12
(PWRBTN#)
Power Good
Pin
B24
(PWR_OK)
Reset Button
Pin
B49
(SYS_RESET#)
SM-Bus Alert
Pin
(SMB_ALERT#)
B15
Battery low
Pin
(BATLOW#)
A27
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To start the module using the power button, the PWRBTN# signal must be at least
50 ms (50 ms ≤ t < 4 s, typical 400 ms) at low level (Power Button Event). Pressing
the power button for at least four seconds turns off power to the module (Power
Button Override).
PWR_OK is internally pulled up to 3.3 V and must be at the high level to power on the
module. This can be driven low to hold the module from powering up as long as
needed. The carrier needs to release the signal when ready.
Low level prevents the module from entering the S0 state (Wake up event). A falling
edge during S0 (Wake up event) causes a direct switch to S5 (Power Failure).
When the SYS_RESET# pin is detected active (falling edge triggered), it allows the
processor to perform a "graceful" reset, by waiting up to 25 ms for the SMBus to go
idle before forcing a reset, even though activity is still occurring. Once the reset is
asserted, it remains asserted for 5 ms to 6 ms regardless of whether the SYS_RESET#
input remains asserted or not.
With an external battery manager present and SMB_ALERT #connected, the module
always powers on even if the BIOS switch "After Power Fail" is set to "Stay Off".
BATLOW# can be used as a power fail indication a Type 7 system where assertion
prevents wake from S3-S5 states.
COMe-bID7 User Guide Rev. 1.2
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