Machxo2 Fpga; Jtag Interface Circuits; Figure 7.4. J1 Header Landing And Led Array Callout; Table 7.7. Machxo2 And Machxo3 Fpga Interface Reference - Lattice Semiconductor MachXO2 Breakout Board User Manual

J1
1
J1
3.3
TDO
TDI
NC
NC
TMS
GND
TCK
8

7.2.3. MachXO2 FPGA

The MachXO2-7000HE-4TG144C is a 144-pin TQFP package FPGA device which provides up to 114 usable I/O in a 20
mm × 20 mm package. 108 I/O are accessible from the breakout board headers.
Table 7.6. MachXO2 and MachXO3 FPGA Interface Reference
Item
Reference Designators
Part Number
Manufacturer
Web Site

7.2.4. JTAG Interface Circuits

For power and programming an FTDI USB UART/FIFO IC converter provides a communication interface between a PC host and
the JTAG programming chain of the Breakout Board. The USB 5V supply is also used as a source for the 3.3 V supply rail. A USB
mini-B socket is provided for the USB connector cable.
Table 7.7. JTAG Interface Reference
Item
Reference Designators
Part Number
Manufacturer
Web Site
© 2014-2022 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02051-2.3
LCM XO 2-7000HE4TG144C

Figure 7.4. J1 Header Landing and LED Array Callout

MachXO2 Breakout Board Evaluation Kit
LED
D8
D7
D8
D6
D5
D4
D1 D3
D2
D1
Description
U3
LCMXO2-7000HE-4TG144C
Lattice Semiconductor
www.latticesemi.com
Description
U1
FT2232HL
Future Technology Devices International (FTDI)
www.ftdichip.com
Evaluation Board User Guide
LED Array
MachXO2
Function Pin
LED7 107
LED6 106
LED5 105
LED4 104
LED3 100
LED2 99
LED1 98
LED0 97
19