Espressif Systems ESP32 Technical Reference Manual page 97

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7.4 Registers
31
PCNT_CNT_THR_EVENT_Un_INT_RAW The
PCNT_CNT_THR_EVENT_Un_INT
31
PCNT_CNT_THR_EVENT_Un_INT_ST The
PCNT_CNT_THR_EVENT_Un_INT
31
PCNT_CNT_THR_EVENT_Un_INT_ENA The
PCNT_CNT_THR_EVENT_Un_INT
Espressif Systems
Register 7.5: PCNT_INT_RAW_REG (0x0080)
0x0000000
raw
interrupt. (RO)
Register 7.6: PCNT_INT_ST_REG (0x0084)
0x0000000
masked
interrupt. (RO)
Register 7.7: PCNT_INT_ENA_REG (0x0088)
0x0000000
interrupt. (R/W)
96
8
7
6
0
0
interrupt
status
8
7
6
0
0
interrupt
status
8
7
6
0
0
interrupt
enable
ESP32 Technical Reference Manual V1.0
7 PULSE_CNT
5
4
3
2
1
0
0
0
0
0
0
0
Reset
bit
for
the
5
4
3
2
1
0
0
0
0
0
0
0
Reset
bit
for
the
5
4
3
2
1
0
0
0
0
0
0
0
Reset
bit
for
the

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