Espressif Systems ESP32 Technical Reference Manual page 93

7.3 Register Summary
7.2.4 Examples
Figure 17 shows channel 0 being used as an up-counter. The configuration of channel 0 is shown below.
• CNT_CH0_POS_MODE_Un
• PCNT_CH0_NEG_MODE_Un
• PCNT_CH0_LCTRL_MODE_Un
• PCNT_CH0_HCTRL_MODE_Un
high.
• PCNT_THR_H_LIM_Un
Figure 18 shows channel 0 decrementing the counter. The configuration of channel 0 differs from that in Figure
17 in the following two aspects:
• PCNT_CH0_LCTRL_MODE_Un
decrease instead of increase the counter.
• PCNT_THR_H_LIM_Un
7.2.5 Interrupts
PCNT_CNT_THR_EVENT_Un_INT: This interrupt gets triggered when one of the five channel comparators
detects a match.
7.3 Register Summary
Name
Configuration registers
PCNT_U0_CONF0_REG
Espressif Systems
Figure 17: PULSE_CNT Upcounting Diagram
= 1: increase counter on the rising edge of sig_ch0_un.
= 0: no counting on the falling edge of sig_ch0_un.
= 0: Do not modify counter mode when
= 2: Do not allow counter increments/decrements when
= 5: PULSE_CNT resets to 0 when the count value increases to 5.
Figure 18: PULSE_CNT Downcounting Diagram
= 1: invert counter mode when
= -5: PULSE_CNT resets to 0 when the count value decreases to -5.
Description
Configuration register 0 for unit 0
sig_ch0_un
ctrl_ch0_un
92 ESP32 Technical Reference Manual V1.0
7 PULSE_CNT
is low.
sig_ch0_un
is at low level, so it will
Address Access
0x3FF57000 R/W
is