Espressif Systems ESP32 Technical Reference Manual page 106

8.4 Registers
31
TIMGn_Tx_WDTFEED_REG Write any value to feed the MWDT. (WO)
31
TIMGn_Tx_WDTWPROTECT_REG If the register contains a different value than its reset value, write
protection is enabled. (R/W)
31
0 0 0 0 0 0 0
TIMGn_Tx_INT_WDT_INT_ENA The interrupt enable bit for the
(R/W) (R/W)
TIMGn_Tx_INT_T1_INT_ENA The interrupt enable bit for the
(R/W)
TIMGn_Tx_INT_T0_INT_ENA The interrupt enable bit for the
(R/W)
Espressif Systems
Register 8.16: TIMGn_Tx_WDTFEED_REG (0x0060)
0x000000000
Register 8.17: TIMGn_Tx_WDTWPROTECT_REG (0x0064)
0x050D83AA1
Register 8.18: TIMGn_Tx_INT_ENA_REG (0x0098)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TIMGn_Tx_INT_WDT_INT
TIMGn_Tx_INT_T1_INT
TIMGn_Tx_INT_T0_INT
105 ESP32 Technical Reference Manual V1.0
8 64-BIT TIMERS
3 2 1
0 0 0 0 0 0 0 0
interrupt.
interrupt. (R/W)
interrupt. (R/W)
0
Reset
0
Reset
0
0 Reset