4.6 Light-sleep Mode Pin Functions
4.4.2 Functional Description
Two registers must be configured in order to bypass the GPIO Matrix for peripheral I/O:
1. IO_MUX for the GPIO pad must be set to the desired pad function (Section
2. For inputs, the SIG_IN_SEL register must be set to route the input directly to the peripheral.
4.5 RTC IO_MUX for Low Power and Analog I/O
4.5.1 Summary
18 pins have low power (RTC domain) capabilities and analog functions which are handled by the RTC
subsystem of ESP32. The IO_MUX and GPIO Matrix are not used for these functions, instead the RTC_MUX is
used to redirect the I/O to the RTC subsystem.
When configured as RTC GPIOs, the output pads can still retain the output level value when the chip is in
Deep-sleep mode, and the input pads can wake up the chip from Deep-sleep.
Section
4.11
has a list of RTC_MUX pins and their functions.
4.5.2 Functional Description
Each pad with analog and RTC functions is controlled by the RTC_IO_TOUCH_PADx_TO_GPIO bit in the
RTC_GPIO_PINx
register. By default this bit is set to 1, routing all I/O via the IO_MUX subsystem as described in
earlier subsections.
If the RTC_IO_TOUCH_PADx_TO_GPIO bit is cleared, then I/O to and from that pad is routed to the RTC
subsystem instead. In this mode, the
the pad are also available. See Section
See
4.11
for a table mapping GPIO pads to their RTC equivalent pins and analog functions. Note that the
RTC_IO_PINx
registers use the RTC GPIO pin numbering, not the GPIO pad numbering.
4.6 Light-sleep Mode Pin Functions
Pins can have different functions when the ESP32 is in Light-sleep mode. If the GPIOxx_SLP_SEL bit in the
IO_MUX register for a GPIO pad is set to 1, a different set of registers is used to control the pad when the ESP32
is in Light-sleep mode:
IO_MUX Function
Output Drive Strength
Pullup Resistor
Pulldown Resistor
Output Enable
If GPIOxx_SLP_SEL is set to 0, the pin functions remain the same in both normal execution and Light-sleep
modes.
Espressif Systems
RTC_GPIO_PINx
4.11
for a list of RTC pin functions.
Table 15: IO_MUX Light-sleep Pin Function Registers
Normal Execution
OR GPIOxx_SLP_SEL = 0
GPIOxx_FUNC_DRV
GPIOxx_FUNC_WPU
GPIOxx_FUNC_WPD
(From GPIO Matrix _OEN field)
register is used for digital I/O and the analog features of
Light-sleep Mode
AND GPIOxx_SLP_SEL = 1
GPIOxx_MCU_DRV
GPIOxx_MCU_WPU
GPIOxx_MCU_WPD
GPIOxx_MCU_OE
32
ESP32 Technical Reference Manual V1.0
4 IO_MUX AND GPIO MATRIX
4.10
has a list of pad functions).
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