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About This Guide The guidelines outline recommended design practices when developing Audio products based on the ESP32. Release Notes Date Version Release notes 2019.01 V1.0 Initial release. Documentation Change Notification Espressif provides email notifications to keep customers updated on changes to technical documentation.
2.1.1. PCB Layers ........................2.1.2. General Guidelines for Routing Traces ................. 2.2. Key Points of PCB Layout Design ..................... 2.2.1. Positioning an ESP32 Module on a Baseboard ............2.2.2. Positioning Plug-in Components ................2.2.3. Positioning Chip Components ................... 2.3. Power Traces, Ground Traces, and Signal Traces ..............
• Power supply and GND plane. • Design rules of audio chips. • Pin configuration of the ESP32 module. 1.1. Power Supply and GND Plane 1.1.1. USB/Battery Power Scheme When the module works in Wi-Fi mode, peak current in the circuit is very high. The suggested output current for the module's power supply is no less than 500 mA.
The power management chip of your choice should meet the circuit requirements for input and output of current and voltage, low noise, efficiency and other aspects of the circuit. For example: Power Supply for ESP32: VDD33 AP7361C-33-ER-7/13 0R(5%) 3.3V/800mA...
1. Schematic Design Figure 1-3. Circuit for Splitting Ground Planes 1.2. Design Rules for Audio Chip Each chip has its own design rules. For example, a codec might require very strict rules for digital and analog signals, otherwise unwanted noise might occur. Digital signal processors (DSP) might require different reference ground planes.
Figure 1-5. Reference Circuit Design for a Codec Ground Plane 1.3. Pin Configuration of ESP32 Most pins of an ESP32 module can be reconfigured with high flexibility, according to your requirements, but there are still some guidelines that you need to follow.
ESP32 cannot identify USB directly, so a USB to UART chip is needed in your design, such as CP2102- GM. The UART pin of the chip is connected with the UART0 pin of ESP32, which can be used to flash programs to ESP32 and serves as an interactive interface with the PC.
1. Schematic Design Figure 1-7. Reference Circuit for USB-UART Chip 1.3.5. Strapping Pins and Other Special Pins GPIO0 is one of the strapping pins, and its level state in the power-on reset process is • related to download: - “1”: enter Flash startup mode, and the chip defaults to “1”. - “0”: enter download mode.
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GPIO12 cannot conflict with the output voltage of LDO. • Pins used as ADC, DAC, TouchPad, SD card, JTAG, RTC domain pins required in low- power sleep mode, etc. are all special pins. Please refer to ESP32 Datasheet while configuring these pins. Espressif ! /19 2019.01...
Components can be placed either on the TOP layer or BOTTOM layer according to the actual situation, but it is recommended to set the adjacent layer of ESP32 module as GND layer. Even if ESP32 module is placed on the BOTTOM layer, it is recommended to set the third layer as a GND layer and the second layer as a POWER layer.
Figure 2-2. Non-recommended Trace Routing 2.2. Key Points of PCB Layout Design 2.2.1. Positioning an ESP32 Module on a Baseboard Place the module's PCB antenna area outside the baseboard, but put the module as close to the edge of the baseboard as possible, so that the antenna's feed point is closest to the board edge.
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2. PCB Layout Design Figure 2-3. ESP32 Module Antenna Position on Baseboard Note: As shown in Figure 2-3, the recommended position for an ESP32 module on the baseboard is: Position 3: Highly recommended. Position 4: Recommended. Position 1, 2, 5: Not recommended.
2. PCB Layout Design Figure 2-5. Reference Design for Module Placement 2.2.2. Positioning Plug-in Components For the USB interface, battery socket holder, power switch, SD card, headphone socket, external speaker socket, debugging pin header, mounting hole, etc., the positioning of their components should adhere to the following principles: Taking component structures into account, trying to make mounting/connecting easy.
2. PCB Layout Design 2.2.3. Positioning Chip Components It is recommended to place the chip components and their peripherals together, especially the filter capacitor for the power supply. These capacitors must be placed as close to the power pins as possible and distributed evenly. Please make sure you have a filter capacitor near each power pin, but do not stack all the capacitors in one place.
2. PCB Layout Design Figure 2-9. Reference Placement for Chip Components 2.3. Power Traces, Ground Traces, and Signal Traces 2.3.1. Power Traces Routing The width of power traces and vias (holes) through layers should meet the requirements of current flowing: •...
2. PCB Layout Design It is recommended to separate different power traces from each other by ground • traces and to plate copper for power supplies on adjacent layers to avoid overlapping. It helps to reduce mutual interference. In the figure below, red and purple represent power copper for different purposes, and blue represents ground copper.
2. PCB Layout Design Figure 2-11. Reference Design for Ground Trace Routing 2.3.3. Signal Traces Routing • For the I2C, I2S, and UART groups, each respective group's traces should run parallel with as wide spacing as possible and be isolated from other groups with GND copper foil.
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2. PCB Layout Design Figure 2-15. Reference Design for Audio Signal Trace Routing Figure 2-16. Reference Design for TouchPad Traces Routing Espressif 2019.01...
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