Peripherals; External Memory Address Mapping - Espressif Systems ESP32 Technical Reference Manual

1.3 Functional Description
Bus Type
Low Address
Data 0x3F40_0000
Data 0x3F80_0000
Bus Type
Low Address
Instruction 0x400C_2000

1.3.4 Peripherals

The ESP32 has 41 peripherals. Table
Almost all peripheral modules can be accessed by either CPU at the same address, the only exception being the
PID Controller.
Bus Type
Low Address
Data 0x3FF0_0000
Data 0x3FF0_1000
Data 0x3FF0_2000
Data 0x3FF0_3000
Data 0x3FF0_4000
0x3FF0_5000
Data 0x3FF1_0000
0x3FF1_4000
Data 0x3FF1_F000
0x3FF2_0000
Data 0x3FF4_0000
0x3FF4_1000
Data 0x3FF4_2000
Data 0x3FF4_3000
Data 0x3FF4_4000
0x3FF4_5000
Data 0x3FF4_8000
Data 0x3FF4_9000
0x3FF4_A000
Data 0x3FF4_B000
Data 0x3FF4_C000
0x3FF4_D000
Data 0x3FF4_F000
Data 0x3FF5_0000
0x3FF5_1000
Data 0x3FF5_3000
Data 0x3FF5_4000
Espressif Systems
Table 4: External Memory Address Mapping
Boundary Address
High Address
0x3F7F_FFFF
0x3FBF_FFFF
Boundary Address
High Address
0x40BF_FFFF
5 specifically describes the peripherals their respective address ranges.
Table 5: Peripheral Address Mapping
Boundary Address
High Address
0x3FF0_0FFF
0x3FF0_1FFF
0x3FF0_2FFF
0x3FF0_3FFF
0x3FF0_4FFF
0x3FF0_FFFF
0x3FF1_3FFF
0x3FF1_EFFF
0x3FF1_FFFF
0x3FF3_FFFF
0x3FF4_0FFF
0x3FF4_1FFF
0x3FF4_2FFF
0x3FF4_3FFF
0x3FF4_4FFF
0x3FF4_7FFF
0x3FF4_8FFF
0x3FF4_9FFF
0x3FF4_AFFF
0x3FF4_BFFF
0x3FF4_CFFF
0x3FF4_EFFF
0x3FF4_FFFF
0x3FF5_0FFF
0x3FF5_2FFF
0x3FF5_3FFF
0x3FF5_4FFF
Size Target
4 MB External Flash
4 MB External SRAM
Size Target
11512 KB External Flash
Size Target
4 KB DPort Register
4 KB AES Accelerator
4 KB RSA Accelerator
4 KB SHA Accelerator
4 KB Secure Boot
44 KB Reserved
16 KB Cache MMU Table
44 KB Reserved
4 KB PID Controller
128 KB Reserved
4 KB UART0
4 KB Reserved
4 KB SPI1
4 KB SPI0
4 KB GPIO
12 KB Reserved
4 KB RTC
4 KB IO MUX
4 KB Reserved
4 KB SDIO Slave
4 KB UDMA1
8 KB Reserved
4 KB I2S0
4 KB UART1
8 KB Reserved
4 KB I2C0
4 KB UDMA0
14 ESP32 Technical Reference Manual V1.0
1 SYSTEM AND MEMORY
Comment
Read
Read and Write
Comment
Read
Comment
Per-CPU peripheral
One of three parts