Espressif Systems ESP32 Technical Reference Manual page 80
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- Instruction set (103 pages) ,
- Hardware design manuallines (44 pages) ,
- Manual (29 pages)
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5.4 Registers
31
0
0
0
0
0
0
0
LEDC_DUTY_CHNG_END_LSCHn_INT_ENA The
LEDC_DUTY_CHNG_END_LSCHn_INT
LEDC_DUTY_CHNG_END_HSCHn_INT_ENA The
LEDC_DUTY_CHNG_END_HSCHn_INT
LEDC_LSTIMERx_OVF_INT_ENA The interrupt enable bit for the
rupt. (R/W)
LEDC_HSTIMERx_OVF_INT_ENA The interrupt enable bit for the
rupt. (R/W)
31
0
0
0
0
0
0
0
LEDC_DUTY_CHNG_END_LSCHn_INT_CLR Set
LEDC_DUTY_CHNG_END_LSCHn_INT
LEDC_DUTY_CHNG_END_HSCHn_INT_CLR Set
LEDC_DUTY_CHNG_END_HSCHn_INT
LEDC_LSTIMERx_OVF_INT_CLR Set this bit to clear the
LEDC_HSTIMERx_OVF_INT_CLR Set this bit to clear the
(WO)
Espressif Systems
Register 5.17: LEDC_INT_ENA_REG (0x0188)
24
23
22
21
20
19
18
17
0
0
0
0
0
0
0
0
interrupt. (R/W)
interrupt. (R/W)
Register 5.18: LEDC_INT_CLR_REG (0x018C)
24
23
22
21
20
19
18
17
0
0
0
0
0
0
0
0
interrupt. (WO)
interrupt. (WO)
16
15
14
13
12
11
10
9
0
0
0
0
0
0
0
0
interrupt
enable
interrupt
LEDC_LSTIMERx_OVF_INT
LEDC_HSTIMERx_OVF_INT
16
15
14
13
12
11
10
9
0
0
0
0
0
0
0
0
this
bit
this
bit
LEDC_LSTIMERx_OVF_INT
LEDC_HSTIMERx_OVF_INT
79
ESP32 Technical Reference Manual V1.0
5 LED_PWM
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
bit
for
enable
bit
for
inter-
inter-
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
to
clear
to
clear
interrupt. (WO)
interrupt.
0
0
Reset
the
the
0
0
Reset
the
the
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