Espressif Systems ESP32 Technical Reference Manual page 49
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- Instruction set (103 pages) ,
- Hardware design manuallines (44 pages) ,
- Manual (29 pages)
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4.13 Registers
31
x
x
x
x
x
x
x
GPIO_IN_REG GPIO0-31 input value. Each bit represents pad input value, 1 for high level and 0 for
low level. (RO)
31
0
0
0
0
0
0
0
GPIO_IN_DATA_NEXT GPIO32-39 input value. Each bit represents pad input value. (RO)
31
x
x
x
x
x
x
x
GPIO_STATUS_REG GPIO0-31 interrupt status register. Each bit can be the two interrupt sources
for the two CPUs. The enable bits in GPIO_STATUS_INTERRUPT corresponding to the 0-4 bits in
GPIO_PINn_REG should be set to 1. (R/W)
31
x
x
x
x
x
x
x
GPIO_STATUS_W1TS_REG GPIO0-31 interrupt status set register. For every bit that is one in the
value that is written here, the corresponding bit in GPIO_STATUS_INTERRUPT will be set. (RO)
31
x
x
x
x
x
x
x
GPIO_STATUS_W1TC_REG GPIO0-31 interrupt status clear register. For every bit that is one in the
value that is written here, the corresponding bit in GPIO_STATUS_INTERRUPT will be cleared. (RO)
Espressif Systems
Register 4.14: GPIO_IN_REG (0x003c)
x
x
x
x
x
x
x
x
Register 4.15: GPIO_IN1_REG (0x0040)
0
0
0
0
0
0
0
0
Register 4.16: GPIO_STATUS_REG (0x0044)
x
x
x
x
x
x
x
x
Register 4.17: GPIO_STATUS_W1TS_REG (0x0048)
x
x
x
x
x
x
x
x
Register 4.18: GPIO_STATUS_W1TC_REG (0x004c)
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
x
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x
x
x
x
x
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x
48
ESP32 Technical Reference Manual V1.0
4 IO_MUX AND GPIO MATRIX
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8
7
0
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0
x
Reset
0
x
Reset
0
x
Reset
0
x
Reset
0
x
Reset
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