Espressif Systems ESP32 Technical Reference Manual page 57
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4.13 Registers
Register 4.38: RTCIO_RTC_GPIO_ENABLE_W1TS_REG (0x0004)
31
x
x
x
x
x
x
x
RTCIO_RTC_GPIO_ENABLE_W1TS GPIO0-17 output enable set register. For every bit that is one
in the value that is written here, the corresponding bit in RTCIO_RTC_GPIO_ENABLE will be set.
(WO)
Register 4.39: RTCIO_RTC_GPIO_ENABLE_W1TC_REG (0x0005)
31
x
x
x
x
x
x
x
RTCIO_RTC_GPIO_ENABLE_W1TC GPIO0-17 output enable clear register. For every bit that is
one in the value that is written here, the corresponding bit in RTCIO_RTC_GPIO_ENABLE will be
cleared. (WO)
31
x
x
x
x
x
x
x
RTCIO_RTC_GPIO_STATUS_INT GPIO0-17 interrupt status. Bit14 is GPIO[0], bit15 is GPIO[1],
etc.
This register should be used together with RTCIO_RTC_GPIO_PINn_INT_TYPE in RT-
CIO_RTC_GPIO_PINn_REG. 1 means there is corresponding interrupt, 0 means there is no in-
terrupt. (R/W)
Espressif Systems
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Register 4.40: RTCIO_RTC_GPIO_STATUS_REG (0x0006)
x
x
x
x
x
x
x
x
14
27
x
x
x
0
0
0
0
0
14
27
x
x
x
0
0
0
0
0
14
27
x
x
x
0
0
0
0
0
56
ESP32 Technical Reference Manual V1.0
4 IO_MUX AND GPIO MATRIX
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
0
Reset
14
0
Reset
14
0
Reset
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