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PCI-946-1 and P3S440BX Technical Reference manual
3.5.4.
Power Fail Monitoring
The power failure detector status can be readout from one bit of the system register located
at the address 0 x 191h Bit 0. The detection conforms to the following conditions (* =
active low signal):
It always monitors the +5V power supply. When it drops below 4.65V (typical), the system
is reset.
It can monitor the onboard battery. When the battery is in a low condition (below 2.9V
typical), the PFO* (power fail output) signal goes low. The status of the PFO* signal can
be read at I/O address 4031h, bit 1 (0 = failed, 1 = good). An interrupt handler can then
service the interrupt. If you choose not to generate an NMI, you can use an algorithm to
detect a low battery condition and respond accordingly.
For more information, contact the Technical Support department
3-16
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