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16.1 Reset Function
The following three operations are available to generate the reset signal.
(1) External reset input via a RESET pin
(2) Internal reset by inadvertent program loop time detection watchdog timer
(3) Internal reset by power-on clear (POC)
(1) External reset input by RESET pin
When a low level is input to the RESET pin, the device is reset, and each hardware unit enters the status shown
in Table 16-1. While the reset signal is input and during the oscillation stabilization time immediately after
the RESET signal has been deasserted, each pin goes into a high-impedance state (however, the P130 to
P132 pins become low level, and the VCOH and VCOL pins are pulled down).
The RESET signal is deasserted when a high level is input to the RESET pin, and the program execution is
started after the oscillation stabilization time (2
(2) Internal reset by inadvertent program loop time detection of watchdog timer
Reset is effected and each hardware unit enters the status shown in Table 16-1 when the watchdog timer
overflow. While reset is in effect and during the oscillation stabilization time immediately after the effect of
reset has been cleared, each pin goes into a high-impedance state (however, the P130 to P132 pins become
low level, and the VCOH and VCOL pins are pulled down).
Reset by the watchdog timer is cleared immediately after reset has been effected, and the program execution
is started after the oscillation stabilization time (2
(3) Internal reset by power-on clear (POC)
Reset is effected by means of power-on clear under the following conditions:
• If supply voltage is less than 3.5 V
• If supply voltage drops to less than 2.2 V
• If supply voltage drops to less than 3.5 V
When these reset conditions of power-on clear are satisfied, reset is effected, and each hardware unit enters
the status shown in Table 16-1. While the reset signal is input and during the oscillation stabilization time
immediately after the reset signal has been deasserted, each pin goes into a high-impedance state (the P130
to P132 pins become low level, however).
Reset by power-on clear is cleared if the supply voltage rises beyond a specific level, and the program
execution is started after the oscillation stabilization time (2
Note
These voltage values are maximum values. Actually, reset is effected at a voltage lower than these.
CHAPTER 16 RESET FUNCTION
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