Operand Address Addressing; Implied Addressing - NEC mPD178054 Series User Manual

3.4 Operand Address Addressing

The following methods are available to specify the register and memory (addressing) to undergo manipulation
during instruction execution.

3.4.1 Implied addressing

[Function]
The registers that functions as an accumulator (A and AX) among the general-purpose registers are automatically
addressed (implied). Of the µ PD178054 Subseries instruction words, the following instructions employ implied
addressing.
Instruction
MULU A register for multiplicand and AX register for product storage
DIVUW AX register for dividend and quotient storage
ADJBA/ADJBS A register for storage of numeric values which become decimal correction targets
ROR4/ROL4 A register for storage of digit data which undergoes digit rotation
[Operand format]
Because implied addressing can be automatically employed with an instruction, no particular operand format is
necessary.
[Example]
In the case of MULU X
With an 8-bit × 8-bit multiply instruction, the product of register A and register X is stored in AX. In this example,
the A and AX registers are specified by implied addressing.
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CHAPTER 3 CPU ARCHITECTURE
Register to Be Specified by Implied Addressing
User's Manual U15104EJ2V0UD