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Figure 3-5. Data Memory Addressing of µ PD178054
F F F F H
Special function
registers (SFRs)
256 × 8 bits
F F 2 0 H
F F 1 F H
F F 0 0 H
F E F F H
General-purpose registers
32 × 8 bits
F E E 0 H
F E D F H
Internal high-speed RAM
1024 × 8 bits
F E 2 0 H
F E 1 F H
F B 0 0 H
F A F F H
Reserved
8 0 0 0 H
7 F F F H
Internal ROM
32768 × 8 bits
0 0 0 0 H
CHAPTER 3 CPU ARCHITECTURE
SFR addressing
Register addressing
User's Manual U15104EJ2V0UD
Short direct
addressing
Direct addressing
Register indirect
addressing
Based addressing
Based indexed
addressing
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