Table of Contents
Advertisement
1.7 Functional Outline
Item
Internal
ROM
High-speed RAM
General-purpose registers
Minimum instruction execution time
Instruction set
I/O ports
A/D converter
Serial interface
Timer
Buzzer output
Vectored
Maskable
interrupt
sources
Non-maskable
Software
PLL
Division mode
frequency
synthesizer
Reference frequency
Charge pump
Phase comparator
Frequency counter
Reset
Supply voltage
Package
Note
For details, refer to CHAPTER 16 RESET FUNCTION.
CHAPTER 1 OUTLINE
µ PD178053
24 KB
32 KB
(Mask ROM)
(Mask ROM)
1024 bytes
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
0.45 µ s/0.89 µ s/1.78 µ s/3.56 µ s/7.11 µ s (with crystal resonator of f
• 16-bit operation
• Multiplication/division (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD adjustment, etc.
Total:
62 pins
• CMOS I/O:
53 pins
• CMOS input:
6 pins
• N-ch open-drain output:
3 pins
8-bit resolution × 6 channels
• 3-wire serial I/O mode: 2 channels
• 3-wire serial I/O mode (on-chip time-division transfer): 1 channel
• Basic timer (timer carry FF (10 Hz)) : 1 channel
• 8-bit timer/event counter:
• Watchdog timer:
BEEP pin: 1 kHz, 1.5 kHz, 3 kHz, 4 kHz
BUZ pin:
549 Hz, 1.10 kHz, 2.20 kHz, 4.39 kHz
Internal : 11
External: 5
Internal: 1
1
2 types
• Direct division mode (VCOL pin)
• Pulse swallow mode (VCOL and VCOH pins)
Seven types selectable in software (1, 3, 9, 10, 12.5, 25, 50 kHz)
Error out output: 2 pins
Unlock detectable with program
Frequency measurement
• AMIFC pin: For 450 kHz counting
• FMIFC pin: For 450 kHz/10.7 MHz counting
• Reset by RESET pin
• Internal reset by watchdog timer
• Reset by power-on clear circuit
• Detection of less than 4.5 V
• Detection of less than 3.5 V
• Detection of less than 2.2 V
• V
= 4.5 to 5.5 V (during CPU, PLL operation)
DD
• V
= 3.5 to 5.5 V (during CPU operation)
DD
80-pin plastic QFP (14 × 14)
User's Manual U15104EJ2V0UD
µ PD178054
32 KB
(Flash memory)
4 channels
1 channel
Note
(reset does not occur, however)
Note
(during CPU operation)
Note
(in STOP mode)
µ PD178F054
= 4.5 MHz)
X
27
Advertisement
Table of Contents
