NEC mPD178054 Series User Manual page 49

(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-speed RAM
area (FB00H to FEFFH for µ PD178053, 178054, and 178F054) can be set as the stack area.
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SP SP15 SP14 SP13 SP12 SP11
The SP is decremented ahead of a write (save) to the stack memory and is incremented after a read (restored)
from the stack memory.
Each stack operation saves/restores data as shown in Figures 3-10 and 3-11.
Caution Since reset input makes SP contents undefined, be sure to initialize the SP before instruction
execution.
PUSH rp instruction
SP _ 2
SP
SP _ 2
Register pair lower
SP _ 1
Register pair upper
SP
Figure 3-11. Data to Be Restored from Stack Memory
POP rp instruction
SP Register pair lower
Register pair upper
SP + 1
SP SP + 2
CHAPTER 3 CPU ARCHITECTURE
Figure 3-9. Configuration of Stack Pointer
SP10 SP9 SP8
Figure 3-10. Data to Be Saved to Stack Memory
CALL, CALLF, and
CALLT instruction
SP _ 2
SP
SP _ 2
SP _ 1
SP
SP
SP + 1
SP SP + 2
User's Manual U15104EJ2V0UD
SP7 SP6 SP5 SP4
SP _ 3
SP
SP _ 3
SP _ 2
PC7 to PC0
SP _ 1
PC15 to PC8
SP
RET instruction
SP
PC7 to PC0
SP + 1
PC15 to PC8
SP + 2
SP SP + 3
0
SP3 SP2 SP1 SP0
Interrupt and
BRK instruction
PC7 to PC0
PC15 to PC8
PSW
RETI and RETB
instruction
PC7 to PC0
PC15 to PC8
PSW
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